A semiconductor module includes a semiconductor element, a substrate on which the semiconductor module is mounted, a heat radiating plate on which the substrate is mounted, a resin case, and a first main current electrode and a second main current electrode, in which in the first main current electrode and the second main current electrode, one end of each thereof is joined to a circuit pattern on the substrate, an other end of each thereof is extended through and incorporated in a side wall of the resin case so as to project outward of the resin case, and each thereof has at least a portion of overlap at which a part thereof overlaps in parallel with each other with a gap therebetween, and each thereof has a slope portion provided between an external projection portion and an internal projection portion.

A power module includes at least two power units. Each power unit includes at least one power semiconductor and a substrate. In order to reduce the installation space required for the power module and to improve cooling, the at least one power semiconductor is connected, in particular in a materially bonded manner, to the substrate. The substrates of the at least two power units are each directly connected in a materially bonded manner to a surface of a common heat sink. A power converter having at least one power module is also disclosed.

A printed circuit board including a dielectric insulation layer having a top side facing a first side and a bottom side opposite the first side that faces a second side of the dielectric insulation layer, at least one conducting track formed on the dielectric insulation layer, and one or more conductor rails, wherein each of the one or more conductor rails is mechanically coupled to the dielectric insulation layer, and a first portion of each of the one or more conductor rails is arranged on the first side and a second portion of each of the one or more conductor rails is arranged on the second side of the dielectric insulation layer.

A dual-side cooling (DSC) semiconductor package includes a first metal-insulator-metal (MIM) substrate having a first insulator layer, first metallic layer, and second metallic layer. A second MIM substrate includes a second insulator layer, third metallic layer, and fourth metallic layer. The third metallic layer includes a first portion having a first contact area and a second portion, electrically isolated from the first portion, having a second contact area. A semiconductor die is coupled with the second metallic layer and is directly coupled with the third metallic layer through one or more solders, sintered layers, electrically conductive tapes, solderable top metal (STM) layers, and/or under bump metal (UBM) layers. The first contact area is electrically coupled with a first electrical contact of the die and the second contact area is electrically coupled with a second electrical contact of the die. The first and fourth metallic layers are exposed through an encapsulant.

Provided is a semiconductor package and a method of manufacturing the same, wherein in the semiconductor package, an area on a surface of a heat release metal layer pressed by a molding die is expanded and the molding die directly and uniformly compresses an upper substrate and/or a lower substrate, each of which does not include heat release posts so that contamination of a substrate occurring due to a molding resin may be prevented and molding may be stably performed.

A power module is provided. The power module includes an electrical interconnection assembly and at least one electronic element group. The electrical interconnection assembly includes a conductive structure and a circuit board. The conductive structure includes a first conductive member and a second conductive manner insulated from each other and arranged side by side. The circuit board is disposed on the conductive structure. The circuit board has an opening. The at least one electronic element group includes a power element that includes a first pad, a second pad, and a third pad. The first and second pads pass through the opening, and are respectively and electrically connected to the first and second conductive members. The third pad is disposed on the circuit board.

A semiconductor device includes a semiconductor chip, a bonding member, and a planar laminated substrate having the semiconductor chip bonded to a front surface thereof via the bonding member. The laminated substrate includes a planar ceramic board, a high-potential metal layer, a low-potential metal layer, an intermediate layer. The planar ceramic board contains a plurality of ceramic particles. The high-potential metal layer contains copper and is bonded to a first main surface of the ceramic board. The low-potential metal layer contains copper, is bonded to a second main surface of the ceramic board, and has a potential lower than a potential of the first main surface of the high-potential metal layer. The intermediate layer is provided between the second main surface and the low-potential metal layer and includes a first oxide that contains at least either magnesium or manganese.

A semiconductor device package comprises a semiconductor switching device having a body, including a first side, and an opposing second side coupled to a substrate. A gate terminal is defined on the semiconductor switching device body first side, the gate terminal having a first side, and an opposing second side facing the semiconductor switching device body. A first gate resistor is disposed on the gate terminal first side, and coupled electrically in series with the gate terminal.

A bonding sheet includes a copper foil and sinterable bonding films formed on both faces of the copper foil. The bonding films each contain copper particles and a solid reducing agent. The bonding sheet is used to bond to a target object to be bonded having at least one metal selected from gold, silver, copper, and nickel on a surface thereof. A bonded structure includes: a bonded object having at least one metal selected from gold, silver, copper, and nickel on a surface thereof; a copper foil; and a bonding layer including a sintered structure of copper particles; and the bonded object and the copper foil are electrically connected to each other via the bonding layer.

A semiconductor device includes: a housing; a substrate inside the housing; first and second semiconductor circuits on the substrate; and first and second planar terminals electrically connected to the first and second semiconductor circuits, respectively, the first and second planar terminals stacked on top of each other, wherein each of the first and second planar terminals extends away from the housing.