Patent classifications
H01L23/3736
THERMALLY ENHANCED PACKAGE TO REDUCE THERMAL INTERACTION BETWEEN DIES
A method of reducing heat flow between IC chips and the resulting device are provided. Embodiments include attaching plural IC chips to an upper surface of a substrate; forming a lid over the IC chips; and forming a slit through the lid at a boundary between adjacent IC chips.
HEAT SPREADERS WITH INTEGRATED PREFORMS
Embodiments of heat spreaders with integrated preforms, and related devices and methods, are disclosed herein. In some embodiments, a heat spreader may include: a frame formed of a metal material, wherein the metal material is a zinc alloy or an aluminum alloy; a preform secured in the frame, wherein the preform has a thermal conductivity higher than a thermal conductivity of the metal material; and a recess having at least one sidewall formed by the frame. The metal material may have an equiaxed grain structure. In some embodiments, the equiaxed grain structure may be formed by squeeze-casting or rheocasting the metal material.
Ultraviolet (UV)-curable sealant in a microelectronic package
Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate. The microelectronic package may further include a sealant material between the package substrate and the IHS. The sealant material may be formed of a material that cures when exposed to ultraviolet (UV) wavelengths. Other embodiments may be described or claimed.
Microelectronic package with underfilled sealant
Embodiments may relate to a method of forming a microelectronic package with an integrated heat spreader (IHS). The method may include placing a solder thermal interface material (STIM) layer on a face of a die that is coupled with a package substrate; coupling the IHS with the STIM layer and the package substrate such that the STIM is between the IHS and the die; performing formic acid fluxing of the IHS, STIM layer, and die; and dispensing, subsequent to the formic acid fluxing, sealant on the package substrate around a periphery of the IHS.
METAL-DIELECTRIC BONDING METHOD AND STRUCTURE
A metal-dielectric bonding method includes providing a first semiconductor structure including a first semiconductor layer, a first dielectric layer on the first semiconductor layer, and a first metal layer on the first dielectric layer, where the first metal layer has a metal bonding surface facing away from the first semiconductor layer; planarizing the metal bonding surface; applying a plasma treatment on the metal bonding surface; providing a second semiconductor structure including a second semiconductor layer, and a second dielectric layer on the second semiconductor layer, where the second dielectric layer has a dielectric bonding surface facing away from the second semiconductor layer; planarizing the dielectric bonding surface; applying a plasma treatment on the dielectric bonding surface; and bonding the first semiconductor structure with the second semiconductor structure by bonding the metal bonding surface with the dielectric bonding surface.
HEAT DISSIPATION STRUCTURE, METHOD FOR MANUFACTURING HEAT DISSIPATION STRUCTURE, AND ELECTRONIC APPARATUS
A heat dissipation structure, for a heat-generating electric component, includes: a heat dissipator disposed along a surface of the electric component; and a porous material held between the electric component and the heat dissipator. The porous material of the heat dissipation structure is impregnated with heat-transfer fluid. The heat-transfer fluid may include liquid metal.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure including a substrate and a deep trench isolation structure is provided. The deep trench isolation structure is disposed in the substrate and is not electrically connected to any device. The deep trench isolation structure includes a heat dissipation layer and a dielectric liner layer. The heat dissipation layer is disposed in the substrate. The dielectric liner layer is disposed between the heat dissipation layer and the substrate.
BONDING SHEET AND BONDED STRUCTURE
A bonding sheet includes a copper foil and sinterable bonding films formed on both faces of the copper foil. The bonding films each contain copper particles and a solid reducing agent. The bonding sheet is used to bond to a target object to be bonded having at least one metal selected from gold, silver, copper, and nickel on a surface thereof. A bonded structure includes: a bonded object having at least one metal selected from gold, silver, copper, and nickel on a surface thereof; a copper foil; and a bonding layer including a sintered structure of copper particles; and the bonded object and the copper foil are electrically connected to each other via the bonding layer.
HEAT DISSIPATION STRUCTURE ASSEMBLY
A heat dissipation structure assembly includes an elastic limiting member, a paste-type heat dissipation wall, a fitting member, a phase-change metal, and an assembling plate. The elastic limiting member is adapted to be disposed at a periphery of a heat source. The paste-type heat dissipation wall is adapted to be in contact with the periphery of the heat source. The fitting member is in contact with the paste-type heat dissipation wall and engaged with the elastic limiting member. The phase-change metal is adapted to be filled into a region among the fitting member, the paste-type heat dissipation wall, and the heat source. When a temperature of the phase-change metal exceeds a critical temperature, a state of the phase-change metal is changed to a liquid state. The assembling plate is connected to the fitting member, and the assembling plate is in contact with the paste-type heat dissipation wall.
GRINDABLE HEAT SINK FOR MULTIPLE DIE PACKAGING
A semiconductor package can include a semiconductor die stack including a top die and one or more core dies below the top die. The semiconductor package can further include a metal heat sink plated on a top surface of the top die and have a plurality of side surfaces coplanar with corresponding ones of a plurality of sidewalls of the semiconductor die stack. A molding can surround the stack of semiconductor dies and the metal heat sink, the molding including a top surface coplanar with an exposed upper surface of the metal heat sink. The top surface of the molding and the exposed upper surface of the metal heat sink are both mechanically altered. For example, the metal heat sink and the molding can be simultaneously ground with a grinding disc and can show grinding marks as a result.