A die level cavity heat sink that can be used within current and emerging packaging technologies to improve die level thermal performance within the package. Alternatively, or in addition, selective heat sink elements are provided to further manage thermal performance within a package by providing thermal pads from the interior of the package to a surface of a mold cap where additional thermal cooling mechanisms can be utilized to further remove heat from the package area.

A die level cavity heat sink that can be used within current and emerging packaging technologies to improve die level thermal performance within the package. Alternatively, or in addition, selective heat sink elements are provided to further manage thermal performance within a package by providing thermal pads from the interior of the package to a surface of a mold cap where additional thermal cooling mechanisms can be utilized to further remove heat from the package area.

A package structure includes: a heat dissipation substrate; at least one die, including a signal transmitting side and a heat conduction side, wherein the signal transmitting side and the heat conduction side are two opposite sides on the die, and the heat conduction side is disposed on and in contact with the heat dissipation substrate; plural metal bumps, disposed on the signal transmitting side; and a package material, encapsulating the die, a side of the heat dissipation substrate in contact with the die, and the metal bumps, wherein a portion of each metal bump is exposed to an outside of the package material.

A semiconductor package includes a semiconductor die, a thermal conductive through via and a conductive paste. The thermal conductive through via is electrically insulated from the semiconductor die. The conductive paste is disposed over the semiconductor die, wherein the thermal conductive through via is thermally coupled to the semiconductor die through the conductive paste.

Detection accuracy of a collector sense in detecting a voltage is improved. A power module 300 has a first conductor 410 and a second conductor 411 to which a plurality of active elements 317 and 315 configuring upper and lower arm circuits are connected. In addition, the power module 300 has an AC side terminal 320B protruding from one side 301a, a positive electrode side terminal 315B and a negative electrode side terminal 319B which protrude from the other side 301b, an intermediate electrode portion 414 that connects the first conductor 410 and the second conductor 411 to each other, and a collector sense wiring 452a in which a collector electrode of an active element 157 and the first conductor 410 are connected to each other via a sense connection portion 415. The intermediate electrode portion 414 is disposed close to the active element 157 which is closest to the AC side terminal 320B, and the sense connection portion 415 is disposed close to the active element 157 which is farthest from the AC side terminal 320B.

Disclosed is a semiconductor package comprising a package substrate, a first semiconductor chip on the package substrate and including a first region and a second region, a second semiconductor chip on the first region, a heat radiation spacer on the second region, a third semiconductor chip supported by the second semiconductor chip and the heat radiation spacer, and a molding layer covering the first to third semiconductor chips and the heat radiation spacer.

A power semiconductor device including a first and second die, each including a plurality of conductive contact regions and a passivation region including a number of projecting dielectric regions and a number of windows. Adjacent windows are separated by a corresponding projecting dielectric region with each conductive contact region arranged within a corresponding window. A package of the surface mount type houses the first and second dice. The package includes a first bottom insulation multilayer and a second bottom insulation multilayer carrying, respectively, the first and second dice. A covering metal layer is arranged on top of the first and second dice and includes projecting metal regions extending into the windows to couple electrically with corresponding conductive contact regions. The covering metal layer moreover forms a number of cavities, which are interposed between the projecting metal regions so as to overlie corresponding projecting dielectric regions.

A sheet-shaped member 440 including a resin insulating layer 441 and a metal foil 442 is used. The sheet-shaped member 440 is deformed following warpage or step difference in a second conductor plate 431 and a fourth conductor plate 433, and therefore, the thickness of the resin insulating layer 441 can be set to a constant thickness of, for example, 120 μm capable of securing insulation properties. By plastically deforming a metal-based heat conduction member 450 having a thickness of, for example, 120 μm interposed between the sheet-shaped member 440 and a cooling member 340, the thickness of the metal-based heat conduction member 450 is changed to absorb the warpage or step difference generated in the second conductor plate 431 and the fourth conductor plate 433. This results in remarkable improvement in heat dissipation as compared with a case where the conductor plates are brought into contact with the cooling member 340 via an insulating layer alone.

A semiconductor device includes a chip, an electrode that is formed on the chip, an inorganic insulating layer that covers the electrode and has a first opening exposing the electrode, an organic insulating layer that covers the inorganic insulating layer, has a second opening surrounding the first opening at an interval from the first opening, and exposes an inner peripheral edge of the inorganic insulating layer in a region between the first opening and the second opening, and an Ni plating layer that covers the electrode inside the first opening and covers the inner peripheral edge of the inorganic insulating layer inside the second opening.

A semiconductor device includes a laminated body, a semiconductor element, and a cooler. The laminated body includes a first conductor layer, a first insulator layer, a second conductor layer, a second insulator layer, and a third conductor layer. The first conductor layer, the first insulator layer, the second conductor layer, the second insulator layer and the third conductor layer are laminated. The first insulator layer is arranged between the first conductor layer and the second conductor layer, and electrically insulates the first conductor layer from the second conductor layer. The second insulator layer is arranged between the second conductor layer and the third conductor layer, and electrically insulates the third conductor layer from the second conductor layer. The semiconductor element is mounted on the first conductor layer. The cooler is connected to the third conductor layer.