An object is to provide a technique capable of suppressing insulation defects caused by the arrival of bubbles contained in an adhesive at a circuit pattern in a semiconductor device. A semiconductor device includes the resin-insulated copper base plate having the copper base plate, the insulating layer provided on the upper surface of the copper base plate, and the circuit pattern provided on the upper surface of the insulating layer, the semiconductor element mounted on the upper surface of the resin-insulated copper base plate, the case joined to the outer peripheral portion of the resin-insulated copper base plate via the adhesive, the sealing material sealing, in the case, the upper surface of the resin-insulated copper base plate and the semiconductor element, and the roughening patterns formed on the upper surface of the insulating layer such that the circuit pattern is enclosed therewith in a plan view.

A semiconductor package includes: a carrier having an electrically insulative body and a first contact structure at a first side of the electrically insulative body; and a semiconductor die having a first pad attached to the first contact structure of the carrier, the first pad being at source or emitter potential. The first pad is spaced inward from an edge of the semiconductor die by a first distance. The semiconductor die has an edge termination region between the edge and the first pad. The first contact structure of the carrier is spaced inward from the edge of the semiconductor die by a second distance greater than the first distance such that an electric field that emanates from the edge termination region in a direction of the carrier during normal operation of the semiconductor die does not reach the first contact structure of the carrier. Methods of production are also provided.

A circuit, comprising a diode, a conductive upper support disposed on top of the diode and electrically coupled to the diode, a conductive lower support disposed underneath the diode and electrically coupled to the diode, a mechanical support disposed adjacent to the diode, the conductive upper support and the conductive lower support, an insulator disposed underneath the mechanical support, an upper terminal coupled to the mechanical support and electrically coupled to the conductive upper support and a lower terminal coupled to the insulator and electrically coupled to the conductive lower support.

A soldering structure configured for preventing solder overflow during soldering and a power module, may include a component to be soldered; and a metal layer having a bonding area, to which the component to be soldered is bonded by solder, and a groove portion formed around the bonding area.

An object is to provide a technique capable of suppressing insulation defects caused by the arrival of bubbles contained in an adhesive at a circuit pattern in a semiconductor device. A semiconductor device includes the resin-insulated copper base plate having the copper base plate, the insulating layer provided on the upper surface of the copper base plate, and the circuit pattern provided on the upper surface of the insulating layer, the semiconductor element mounted on the upper surface of the resin-insulated copper base plate, the case joined to the outer peripheral portion of the resin-insulated copper base plate via the adhesive, the sealing material sealing, in the case, the upper surface of the resin-insulated copper base plate and the semiconductor element, and the roughening patterns formed on the upper surface of the insulating layer such that the circuit pattern is enclosed therewith in a plan view.

An article includes a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and at least one via extending through the substrate from the first major surface to the second major surface over an axial length in an axial dimension. The article also includes a metal connector disposed within the via that hermetically seals the via. The article has a helium hermeticity of less than or equal to 1.0×10.sup.−8 atm-cc/s after 1000 thermal shock cycles, each of the thermal shock cycle comprises cooling the article to a temperature of −40° C. and heating the article to a temperature of 125° C., and the article has a helium hermeticity of less than or equal to 1.0×10.sup.−8 atm-cc/s after 100 hours of HAST at a temperature of 130° C. and a relative humidity of 85%.

According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

A power semiconductor apparatus includes a power semiconductor element having low and high potential side electrodes and a sense electrode, high and low potential side conductors electrically connected with the high potential side electrodes, respectively, a sense wiring electrically connected with the sense electrode, and a first metal portion facing the low potential side conductor or the low potential side conductor across the sense wiring. When viewed from an array direction of the sense wiring and the first metal portion, the sense wiring has a facing portion facing the high or low potential side conductor, the first metal portion forms a recess in a part overlapping the facing portion, and a depth of the recess is formed such that a distance between a bottom of the recess and the sense wiring is larger than a distance between the sense wiring and the high or low potential side conductor.

One aspect relates to a method for producing a substrate plate for a large-area semiconductor element, particularly for a thyristor wafer or a diode. At least one first layer made from a first material, with a first coefficient of expansion, and at least one second layer made from a second material of low expandability, with a second coefficient of expansion, which is smaller than the first coefficient of expansion, are bonded to one another by means of a low-temperature sintering method at a bonding temperature of 150° C.-300° C. At least one first bonding layer made from a bonding material is formed between the first layer and the second layer and the bonding temperature substantially corresponds to the mounting temperature during the bonding of the substrate plate produced with at least one large-area semiconductor element.

A package and method of making a package. In one example, the package includes an at least partially electrically conductive carrier, a passive component mounted on the carrier, and an at least partially electrically conductive connection structure electrically connecting the carrier with the component and comprising spacer particles configured for spacing the carrier with regard to the component.