A light-emitting apparatus includes a substrate, pads disposed on the substrate, a sacrificial pattern layer and a light-emitting diode element disposed on the sacrificial pattern layer. The light-emitting diode element includes a first type semiconductor layer, a second type semiconductor layer, an active layer, and electrodes. A connection patterns disposed on at least one of the electrodes and the pads. Materials of the connection patterns include hot fluidity conductive materials. The connection patterns cover a sidewall of the sacrificial pattern layer and are electrically connected to the at least one of the electrodes and the pads. In addition, the manufacturing method of the above light-emitting apparatus is also proposed.

A semiconductor device may be provided with a first member, a second member joined to a first region of the first member via a first solder layer and a third member joined to a second region of the first member via a second solder layer. The first region and the second region are located on one side of the first member. The first solder layer contains a plurality of support particles that is constituted of a material having a higher melting point than the first solder layer. The second solder layer does not contain any support particles.

According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 m at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 m at the second major surface and fully fills the via between the first cavity and the second cavity.

A semiconductor device includes a metal base plate, a case component, and a metal component. The metal component is fixed to the case component. A partial region of the metal component is exposed from the case component. The partial region is bonded to the base plate in a bonding portion. In the bonding portion, a surface of the partial region and a surface of the base plate are in direct contact with each other and integrated.

A semiconductor sub-assembly and a semiconductor power module capable of having the reduced thickness of a chip and reduced thermal resistance are provided. The semiconductor sub-assembly includes a single or a plurality of semiconductor chips having a first electrode that is formed on the lower surface thereof, a second electrode that is formed on the upper surface thereof, and a plurality of chip-side signal electrode pads that are formed at one end of the upper surface thereof. The semiconductor chip is embedded in the embedded structure and a plurality of extension signal electrode pads are connected to each of the chip-side signal electrode pads. The extension signal electrode pad is formed on the embedded substrate in a size greater than the chip-side signal electrode pad when viewed on the plane.

A circuit, comprising a diode, a conductive upper support disposed on top of the diode and electrically coupled to the diode, a conductive lower support disposed underneath the diode and electrically coupled to the diode, a mechanical support disposed adjacent to the diode, the conductive upper support and the conductive lower support, an insulator disposed underneath the mechanical support, an upper terminal coupled to the mechanical support and electrically coupled to the conductive upper support and a lower terminal coupled to the insulator and electrically coupled to the conductive lower support.

A wiring board has a metal-made base having a front surface and a back surface, an insulating frame body bonded to the front surface of the base through a bonding layer made of bonding material, a seating provided in an area that is located at an inner side with respect to the frame body on the front surface of the base, a mounting area where a component is supposed to be mounted on the front surface of the base, and a groove formed on the front surface of the base. The groove is arranged in at least an area between the mounting area and the seating on the front surface in plan view, and extends in a direction crossing an opposing direction of the mounting area and the seating.

A chip carrier which comprises a thermally conductive and electrically insulating sheet, a first electrically conductive structure on a first main surface of the sheet, and a second electrically conductive structure on a second main surface of the sheet, wherein the first electrically conductive structure and the second electrically conductive structure extend beyond a lateral edge of the sheet.

A joined body manufacturing method includes: a laminating step for forming a laminated body in which either a copper circuit substrate (first member) or a ceramic substrate (second member) is coated beforehand with a temporary fixing material the main ingredient of which is a saturated fatty acid, the copper circuit substrate and the ceramic substrate are stacked and positioned by the temporary fixing material which has been melted, and by cooling the temporary fixing material the stacked copper substrate and ceramic substrate are temporarily fixed; and a joining step for forming a joined body in which the copper circuit substrate and the ceramic substrate are joined by heating with pressurizing the laminated body in the stacking direction.

A package and method of making a package. In one example, the package includes an at least partially electrically conductive carrier, a passive component mounted on the carrier, and an at least partially electrically conductive connection structure electrically connecting the carrier with the component and comprising spacer particles configured for spacing the carrier with regard to the component.