A die includes a metal pad, a passivation layer over the metal pad, and a polymer layer over the passivation layer. A metal pillar is over and electrically coupled to the metal pad. A metal ring is coplanar with the metal pillar. The polymer layer includes a portion coplanar with the metal pillar and the metal ring.

A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, a plurality of leads including a power lead disposed along a peripheral edge of the die pad, at least one connecting bar connecting the die pad, a power bar disposed on one side of the connecting bar, and a surface mount device (SMD) having a first terminal and a second terminal. The first terminal is electrically connected to the ground level through a first bond wire. The second terminal is electrically connected a power level through a second bond wire.

A semiconductor light emitting device includes a semiconductor light source, a resin package surrounding the semiconductor light source, and a lead fixed to the resin package. The lead is provided with a die bonding pad for bonding the semiconductor light source, and with an exposed surface opposite to the die bonding pad The exposed surface is surrounded by the resin package in the in-plane direction of the exposed surface.

Provided is a semiconductor device capable of having simple wiring in mounting the semiconductor device. The semiconductor device includes at least one P-terminal, at least one N-terminal, a power output terminal, at least one power supply terminal, at least one ground (GND) terminal, at least one control terminal, and a package that is rectangular in a plan view and accommodates an insulated gate bipolar transistor (IGBT) being a high-side switching element, an IGBT being a low-side switching element, and a control circuit. The at least one control terminal is disposed on a first side of the package, opposite to a second side on which the power output terminal is disposed. The at least one P-terminal, the at least one N-terminal, the at least one power supply terminal, and the at least one GND terminal are disposed on a third side of the package, orthogonal to the second side.

The present disclosure provides a power semiconductor module in which a lead frame paddle is extended to form a source lead, a source electrode of a power semiconductor die is electrically connected to the lead frame paddle, a drain electrode is insulated from the lead frame paddle, and a part of the lead frame paddle is exposed to the outside of a mold.

A leadframe strip includes a two-dimensional mechanically interconnected array of leadframe units including a plurality of leadframe unit pairs, the leadframe strip having an overall length and an overall width. The plurality of leadframe unit pairs each include a first leadframe design including a first plurality of tie bars and a plurality of first leads, and a second leadframe design that is different from the first leadframe design including a second plurality of tie bars, and a plurality of second leads. The first plurality of tie bars and the second plurality of tie bars are configured together to provide a plurality of continuous metal support networks that span an entirety of the overall length or the overall width.

An integrated circuit package includes a first die attach pad (DAP) having a first bottom surface, a first semiconductor die attached to the first DAP, a second DAP having a second bottom surface, wherein the first bottom surface and the second bottom surface are coplanar, and a second semiconductor die attached to the second DAP. A nonlinear DAP linking structure couples the first DAP to the second DAP, wherein the DAP linking structure does not include any direct linear connections between the first DAP and the second DAP. The nonlinear DAP linking structure is configured to deform without causing the first DAP and the second DAP to become non-coplanar. A mold compound covers the first and second DAPs, the first and second semiconductor dies, and the nonlinear DAP linking structure.

A temporary protective film for semiconductor sealing molding includes a support film and an adhesive layer provided on one surface or both surfaces of the support film and containing a resin and a silane coupling agent. The content of the silane coupling agent in the temporary protective film may be more than 5% by mass and less than or equal to 35% by mass with respect to the total mass of the resin.

Embodiments of the disclosed subject matter provide a device including a carrier plate, and a die including a mating surface with a patterned thin film of metal or metal oxide surface bonded to the carrier plate using a solder preform with voids that overlay the patterned thin film on the die, where the oxide surface is disposed opposite a moat in a mating surface of the carrier plate, and where the voided regions remain free of solder when the solder is reflowed.

A power semiconductor module includes a leadframe having a first die pad, a second die pad separated from the first die pad, a first power lead formed as an extension of the first die pad, a second power lead separated from the first and second die pads, and a first connection region formed as an extension of the second power lead alongside the second die pad. A first plurality of power semiconductor dies is attached to the first die pad and electrically coupled in parallel. A second plurality of power semiconductor dies is attached to the second die pad and electrically coupled in parallel. A first electrical connection extends between the first plurality of power semiconductor dies and the second die pad in a first direction. A second electrical connection extends between the second plurality of power semiconductor dies and the first connection region in the first direction.