A semiconductor device includes: a semiconductor element having a first main electrode and a second main electrode; a first heat dissipation member and a second heat dissipation member; and a lead frame including a first main terminal connected to the first heat dissipation member and a second main terminal connected to the second main electrode. The second main terminal includes a connection portion connected with the second main electrode, a facing portion extending from the connection portion and facing the first heat dissipation member, and a non-facing portion. The non-facing portion and the first main terminal are arranged in a direction orthogonal to a thickness direction. A side surface of the first main terminal and a side surface of the non-facing portion of the second main terminal face each other.

The semiconductor device includes a semiconductor element having first and second main electrodes, first and second substrates connected to the first and second main electrodes, respectively, first and second main terminals connected to the first and second main electrodes via the first and second substrates, respectively, and a bonding member. The bonding member is interposed between the first and second main electrodes and between the first and second substrates, respectively. At least one of the first and second main terminals includes a plurality of terminals. The first and second main terminals are alternately arranged in one direction orthogonal to the thickness direction of the semiconductor element. The first and second main terminals are directly bonded to the first and second substrates without the bonding member.

A method of forming a power semiconductor module includes providing a substrate of planar sheet metal, forming channels in an upper surface of the substrate that partially extend through a thickness of the substrate and define a plurality of islands in the substrate, mounting a first semiconductor die on a first one of the islands, forming a molded body of encapsulant that covers the substrate, fills the channels, and encapsulates the semiconductor die, forming a hole in the molded body and a recess in the upper surface of the substrate beneath the hole, and arranging a press-fit connector in the hole and forming a mechanical and electrical connection between an interior end of the press-fit connector and the substrate.

A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

A semiconductor package structure and a method for manufacturing the same are provided. The semiconductor package structure includes a substrate, a chip and a dielectric structure. The substrate includes a first portion and a second portion surrounding the first portion. The second portion defines a cavity over the first portion. The chip includes a terminal on an upper surface of the chip. The dielectric structure fills the cavity and laterally encroaches over the upper surface of the chip. The dielectric structure is free from overlapping with the terminal of the chip.

An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

In some examples, a system comprises a die having multiple electrical connectors extending from a surface of the die and a lead coupled to the multiple electrical connectors. The lead comprises a first conductive member; a first non-solder metal plating stacked on the first conductive member; an electroplated layer stacked on the first non-solder metal plating; a second non-solder metal plating stacked on the electroplated layer; and a second conductive member stacked on the second non-solder metal plating, the second conductive member being thinner than the first conductive member. The system also comprises a molding to at least partially encapsulate the die and the lead.

A semiconductor module includes semiconductor elements, a case that houses the semiconductor elements, an external terminal electrically connecting the semiconductor elements and an external conductor, and a nut into which a bolt that secures the external conductor and the external terminal is threaded. The nut includes a cylindrical main body having a threaded hole, and a flange projecting in a direction radially outward of a center axis of the threaded nut hole and being disposed on one face of the main body. The case includes a wall surrounding the nut, the wall having a first recess that houses the main body, a second recess above the first recess and housing the flange, and a notch cut in a portion of the wall surrounding the main body. The first recess extends deeper than the main body, and the fillet is formed on a floor surface of the first recess.

A sensor device includes: a first sensor element; a second sensor element; and a processing chip that includes a semiconductor substrate, a first processor that receives a first detection signal and processes the first detection signal, a second processor that receives the second detection signal and processes the second detection signal, and an isolation portion that electrically isolates the first processor the second processor. The first processor includes a first diagnosis unit that self-diagnoses a presence or absence of a failure. The second processor includes a second diagnosis unit that self-diagnoses a presence or absence of a failure. The processing chip identifiably outputs a first output of the first processor and a second output of the second processor.

A semiconductor device includes a support substrate with leads arranged therearound, a semiconductor die on the support substrate, and a layer of laser-activatable material molded onto the die and the leads. The leads include proximal portions facing towards the support substrate and distal portions facing away from the support substrate. The semiconductor die includes bonding pads at a front surface thereof which is opposed to the support substrate, and is arranged onto the proximal portions of the leads. The semiconductor device has electrically-conductive formations laser-structured at selected locations of the laser-activatable material. The electrically-conductive formations include first vias extending between the bonding pads and a front surface of the laser-activatable material, second vias extending between the distal portions of the leads and the front surface of the laser-activatable material, and lines extending at the front surface of the laser-activatable material and connecting selected first vias to selected second vias.