A substrate structure and a semiconductor package structure including the same are provided. The substrate structure includes a circuit layer and a dielectric structure. The circuit layer has a bottom surface and a top surface opposite to the bottom surface. The dielectric structure around the circuit layer. The dielectric structure covers a first part of the bottom surface of the circuit layer, and exposes a second part of the bottom surface and the top surface of the circuit layer. The dielectric structure exposes the top surface of the circuit layer. In addition, a method of manufacturing a semiconductor package structure is also provided.

There is provided a metal component used for manufacturing a semiconductor device, including: a base material having an electrical conductivity; a nickel layer formed on a surface of the base material and containing nickel as a main component; and a noble metal layer formed on a surface of the nickel layer. The nickel layer includes a first nickel layer not containing phosphorus, and a second nickel layer containing 0.01 to 1 in percent by weight of phosphorus. According to the metal component of the present disclosure, a thickness of the nickel layer can be reduced while good characteristics can be maintained.

A semiconductor package substrate and a method of manufacturing the same are provided. The semiconductor package substrate includes: a base layer including a conductive material, having a first surface and a second surface opposite the first surface, and having a first groove or first trench in the first surface and a second groove or second trench in the second surface; a first resin buried in the first groove or first trench in the first surface of the base layer; and a groove in at least one corner of the first surface of the base layer and having a depth based on the first surface is 1/2 or more of a thickness of the base layer.

A packaged electronic device includes a multilayer lead frame with first and second trace levels, a via level, an insulator, a conductive landing pad and a conductive crack arrest structure, the conductive landing pad has a straight profile that extends along a first direction along a side of the multilayer lead frame, the conductive crack arrest structure has a straight profile along the first direction and the conductive crack arrest structure is spaced from the conductive landing pad along an orthogonal second direction.

A semiconductor package includes a frame having a wiring structure and having a recess portion, a semiconductor chip having an active surface with a connection pad disposed thereon and disposed in the recess portion, an encapsulant sealing the semiconductor chip, and a redistribution layer having a first via connected to the connection and a second via connected to a portion of the wiring structure. The semiconductor chip includes a protective insulating film disposed on the active surface and having an opening exposing a region of the connection pad, and a redistribution capping layer connected to the region of the connection pad and extending onto the protective insulating film, and a surface of the redistribution capping layer is substantially the same level as a surface of the portion of the wiring structure, exposed from the first surface.

A semiconductor device is provided with a heat dissipating face side skirt portion, which is a frame-form projection, on a heat dissipating face of a lead frame. Because of this, creepage distance increases with a small increase in an amount of resin, and insulating properties improve. Also, the heat dissipating face side skirt portion is molded via two transfer molding steps, wettability of the second molding resin with respect to a first molding resin and the lead frame increases, and adhesion improves. Furthermore, an end face of an inner lead is exposed in an element sealing portion on a mounting face side, and covered with a second thin molded portion molded using the second molding resin, whereby heat generated in a semiconductor element can efficiently be caused to escape from faces of both a first thin molded portion and the second thin molded portion, because of which heat dissipation improves.

Semiconductor devices and methods and apparatus to produce such semiconductor devices are disclosed. An integrated circuit package includes a lead frame including a die attach pad and a plurality of leads; a die including a MEMs region defined by a plurality of trenches, the die electrically connected to the plurality of leads; and a mold compound covering portions of the die, the mold compound defining a cavity between a surface of the die and a surface of the mold compound, wherein the mold compound defines a vent.

A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed.

An integrated circuit (IC) package comprises a semiconductor die, a leadframe comprising a plurality of leads coupled to bond pads on the semiconductor die, and an electrically conductive member electrically coupled to the leadframe. A magnetic mold compound encapsulates the electrically conductive member to form an inductor. A non-magnetic mold compound encapsulates the semiconductor die, the leadframe, and the magnetic mold compound.

In one example, an electronic device includes a substrate with a conductive structure and a substrate encapsulant. The conductive structure has a lead with a lead via and a lead protrusion. The lead via can include via lateral sides defined by first concave portions and the lead protrusion can include protrusion lateral sides defined by second concave portions. The substrate encapsulant covers the first concave portions at a first side of the substrate but not the second concave portions so that the lead protrusion protrudes from the substrate encapsulant at a second side of the substrate. An electronic component can be adjacent to the first side of the substrate and electrically coupled to the conductive structure. A body encapsulant encapsulates portions of the electronic component and the substrate. In some examples, the lead can further include a lead trace at the second side of the substrate. In some examples, the substrate can include a redistribution structure at the first side of the substrate. Other examples and related methods are also disclosed herein.