The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.

A power semiconductor module includes a leadframe having a first die pad, a second die pad separated from the first die pad, a first power lead formed as an extension of the first die pad, a second power lead separated from the first and second die pads, and a first connection region formed as an extension of the second power lead alongside the second die pad. A first plurality of power semiconductor dies is attached to the first die pad and electrically coupled in parallel. A second plurality of power semiconductor dies is attached to the second die pad and electrically coupled in parallel. A first electrical connection extends between the first plurality of power semiconductor dies and the second die pad in a first direction. A second electrical connection extends between the second plurality of power semiconductor dies and the first connection region in the first direction.

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

A semiconductor package includes a mounting substrate, a first semiconductor chip on the mounting substrate and electrically connected to the mounting substrate, a heat dissipation element on an upper surface of the first semiconductor chip, where the heat dissipation element comprises a sidewall comprising an inclined surface and an upper surface directly connected to the inclined surface, and a package molding portion on the mounting substrate and the inclined surface of the heat dissipation element. The package molding portion exposes at least a portion of the upper surface of the heat dissipation element, the upper surface of the heat dissipation element is parallel to the upper surface of the first semiconductor chip, and an angle formed by the upper surface of the heat dissipation element and the inclined surface of the heat dissipation element is an obtuse angle.

An assembly (110) for dissipating heat generated by a heat generating electrical component (16) which is surface mounted on a circuit board (11) in a surface mounting process. The assembly comprises a heat buffer (120) made of a thermally and electrically conducing material, and being surface mounted on the circuit board (11) so as to be soldered to a thermal flag (18) of the heat generating electrical component (16). The assembly further comprises a heat sink (12) in thermal contact with the heat buffer, and a galvanic separation (13) between the heat buffer and heat sink. The heat capacitance of the heat buffer can absorb short term increases in heat dissipation from the electrical component, before the heat is further dissipated to the galvanically separated heat sink. This may drastically improve performance of the surface mounted component.

A semiconductor device includes a semiconductor element, a sealing body, and a plurality of terminals. The sealing body seals the semiconductor element therein. The terminals are electrically connected to the semiconductor element inside of the sealing body, and project from the sealing body. Each of the terminals has a rough surface area having a larger surface roughness than a peripheral area in a section in a longitudinal direction of the terminal.

A chip packaging structure includes: at least one semiconductor chip, having a signal processing function; a base material, wherein the semiconductor chip is disposed on the base material; at least one thermal conduction plate, disposed on the base material; and a package material, encapsulating the base material, the thermal conduction plate, and the semiconductor chip. The thermal conduction plate forms at least one thermal conduction channel in the package material.

A semiconductor module includes: a switching device including a gate pad; an output unit including an output pad connected with the gate pad of the switching device through a wire and outputting a drive signal from the output pad to the switching device; a temperature protection circuit detecting temperature and performing protection operation; and a heat conduction pattern connected with the output pad, extending from the output pad toward the temperature protection circuit, and conducting heat generated at the switching device to the temperature protection circuit.

A packaged electronic device comprises a die attach pad enclosed by a package structure, a semiconductor die mounted to a side of the die attach pad, a conductive plate and a polymer layer having a first side on a side of the conductive plate and a second side on the die attach pad. A method of manufacturing a packaged electronic device comprises attaching a first side of a polymer layer to a first side of a conductive plate, attaching a first side of a die attach pad to a second side of the polymer layer and attaching a first side of a semiconductor die to a second side of the die attach pad.