A semiconductor device includes, a semiconductor element, a wiring member arranged to sandwich the semiconductor element, a sealing resin body. The semiconductor element has an SBD formed thereon with a base material of SiC which is a wide band gap semiconductor. The semiconductor element has two main electrodes on both surfaces. The wiring member includes (i) a heat sink electrically connected to a first main electrode and (ii) a heat sink and a terminal electrically connected to a second main electrode. The semiconductor device further includes an insulator. The insulator has a non-conducting element made of silicon. The insulator has joints on both of two surfaces for mechanical connection of the heat sinks.

A microelectronics package assembly and process of making same are disclosed. The flange has an upper surface and a first coating disposed on the upper surface of the flange. The insulator has a bottom surface for mounting onto the flange and an upper surface opposite the bottom surface. A second coating is disposed on the bottom surface of the insulator and a third coating disposed on the upper surface of the insulator. The first coating, the second coating, and the third coating each have a thickness of less than or equal to 1 micron. At least one of the first coating, the second coating, and the third coating is applied via at least one of physical vapor deposition, atomic deposition, or chemical deposition.

An electrical assembly that with an inverter that is mounted to the field windings of a stator. The inverter has a plurality of power semiconductor packages (PSP), each of which including a semiconductor die, a plurality of electric terminals, which are electrically coupled to the semiconductor die, and a heat sink with a base, which is fixedly and electrically coupled to one of the electric terminals, and a plurality of fins that extend axially from the base in a direction away from the semiconductor die. The PSP's are arranged in a circumferentially spaced apart manner. The fins are arranged in rows and are progressively longer in length from a radially-inner most fin to a radially-outer most fin. Slots are formed in the base on a radially-inner side of the base. Each slot extends toward a radially-outer side of the base and intersects a corresponding one of the rows of fins.

An assembly (110) for dissipating heat generated by a heat generating electrical component (16) which is surface mounted on a circuit board (11) in a surface mounting process. The assembly comprises a heat buffer (120) made of a thermally and electrically conducing material, and being surface mounted on the circuit board (11) so as to be soldered to a thermal flag (18) of the heat generating electrical component (16). The assembly further comprises a heat sink (12) in thermal contact with the heat buffer, and a galvanic separation (13) between the heat buffer and heat sink. The heat capacitance of the heat buffer can absorb short term increases in heat dissipation from the electrical component, before the heat is further dissipated to the galvanically separated heat sink. This may drastically improve performance of the surface mounted component.

A lead frame includes: at least one ductile structure, including a bond area, a die paddle, or a lead finger; and at least one sacrificial structure, connected between a corresponding ductile structure and a corresponding near portion in the lead frame, wherein the near portion is a portion of the lead frame close to the ductile structure.

In one example, a semiconductor device comprises a substrate having a top surface and a bottom surface, an electronic device on the bottom surface of the substrate, a leadframe on the bottom surface of the substrate, the leadframe comprising a paddle, wherein the paddle is coupled to the electronic device, and a lead electrically coupled to the electronic device. The semiconductor device further comprises a first protective material contacting the bottom surface of the substrate and a side surface of the electronic device.

In some examples, a semiconductor package includes a semiconductor die having a device side and a non-device side opposing the device side. The device side has a circuit formed therein. The package includes a first conductive member having a first surface coupled to the non-device side of the semiconductor die and a second surface opposing the first surface. The second surface is exposed to a top surface of the semiconductor package. The package includes a second conductive member exposed to an exterior of the semiconductor package and coupled to the device side of the semiconductor die. The package includes a plurality of wirebonded members coupled to the second surface of the first conductive member and exposed to the exterior of the semiconductor package. At least one of the wirebonded members in the plurality of wirebonded members has a gauge of at least 5 mils.

A semiconductor device includes a lead frame including a raised portion on a surface, and a semiconductor element that is face-down mounted on the lead frame and includes a substrate including a Ga.sub.2O.sub.3-based semiconductor, an epitaxial layer including a Ga.sub.2O.sub.3-based semiconductor and stacked on the substrate, a first electrode connected to a surface of the substrate on an opposite side to the epitaxial layer, and a second electrode connected to a surface of the epitaxial layer on an opposite side to the substrate and including a field plate portion at an outer peripheral portion. The semiconductor element is fixed onto the raised portion. An outer peripheral portion of the epitaxial layer, which is located on the outer side of the field plate portion, is located directly above a flat portion of the lead frame that is a portion at which the raised portion is not provided.

A switching power device comprises a device lead-frame. Gates, Kelvin sources and a drain are formed on the device lead-frame, the gates and the Kelvin sources are arranged at one end of the device lead-frame, and the drain is arranged at the other end of the device lead-frame; and two gates and two Kelvin sources are provided. One end of the device lead-frame is sequentially provided with the gate, the Kelvin source, the Kelvin source and the gate, so as to form a symmetrical pin structure.

According to an aspect, a semiconductor package includes a substrate having a first surface and a second surface opposite to the first surface, a semiconductor die coupled to the second surface of the substrate, and a molding encapsulating the semiconductor die and a majority of the substrate, where at least a portion of the first surface is exposed through the molding such that the substrate is configured to function as a heat sink.