H01L23/49568

SEMICONDUCTOR DEVICE
20230105834 · 2023-04-06 ·

A semiconductor device includes a substrate, a semiconductor element, a connection pad, a plated layer, a wire, and an encapsulation resin. The substrate includes a main surface. The semiconductor element is mounted on the main surface and includes a main surface electrode. The connection pad is formed of Cu, arranged with respect to the substrate, separated from the substrate, and includes a connection surface. The plated layer is formed of Ni and partially covers the connection surface. The wire is formed of Al and bonded to the main surface electrode and the plated layer. The encapsulation resin encapsulates the semiconductor element, the connection pad, the plated layer, and the wire.

Semiconductor Device
20220319965 · 2022-10-06 ·

A semiconductor device comprises: a package having a rectangular shape when viewed in plan and including a first side, a second side parallel to the first side, a third side orthogonal to the first side and the second side, and a fourth side parallel to the third side and orthogonal to the first side and the second side; a power supply terminal provided on the first side; a power ground terminal provided on the second side; a switch output terminal provided on the second side; an upper switch connected between the power supply terminal and the switch output terminal; and a lower switch 11L connected between the switch output terminal and the power ground terminal.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

A semiconductor device includes: a package having a top surface and a bottom surface; a semiconductor element arranged in the package; and a base which is arranged in the package and on which the semiconductor element is mounted. A top surface of the base is exposed to the top surface of the package, and a bottom surface of the base is exposed to the bottom surface of the package.

SEMICONDUCTOR DEVICE
20220319962 · 2022-10-06 ·

A semiconductor device includes a semiconductor element, which has a protective film having an opening that exposes a part of a source electrode and disposed/provided to position an end portion thereof on the source electrode. A rewiring layer has wiring that is connected to the source electrode and to a conductive connecting member, and an insulator that covers a part of the source wiring. The insulator includes: an insulating film having (a) an opening for exposing a part of the source wiring, and (b) an end portion of the opening provided in a facing region of the opening; and an insulating film having (c) (i) an opening for exposing a part of the source wiring having a solder arranged therein and (ii) a connecting member arranged therein.

ISOLATED TEMPERATURE SENSOR DEVICE PACKAGE
20220319966 · 2022-10-06 ·

In a described example, an apparatus includes: a package substrate having a die pad configured for mounting a semiconductor die, a first lead connected to the die pad, and a second lead spaced from and electrically isolated from the die pad; a spacer dielectric mounted on the die pad; a semiconductor die including a temperature sensor mounted on the spacer dielectric; electrical connections coupling the semiconductor die to the second lead; and mold compound covering the semiconductor die, the die pad, the electrical connections, and a portion of the package substrate, with portions of the first lead and portions of the second lead exposed from the mold compound to form terminals for a packaged temperature sensor device.

PACKAGED STACKABLE ELECTRONIC POWER DEVICE FOR SURFACE MOUNTING AND CIRCUIT ARRANGEMENT

A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.

Semiconductor package

A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

Electronic devices including electrically insulated load electrodes

An electronic device and method is disclosed. In one example, the electronic device includes an electrically insulating material, a first load electrode arranged on a first surface of the electrically insulating material, and a second load electrode arranged on a second surface of the electrically insulating material opposite to the first surface, wherein the load electrodes are separated by the electrically insulating material along the entire length on which the load electrodes have opposite sections, wherein surfaces of the load electrodes facing away from the electrically insulating material are uncovered by the electrically insulating material.

Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
11646242 · 2023-05-09 · ·

The present disclosure relates to a thermally enhanced package, which includes a carrier, a thinned die over the carrier, a mold compound, and a heat extractor. The thinned die includes a device layer over the carrier and a dielectric layer over the device layer. The mold compound resides over the carrier, surrounds the thinned die, and extends beyond a top surface of the thinned die to define an opening within the mold compound and over the thinned die. The top surface of the thinned die is at a bottom of the opening. At least a portion of the heat extractor is inserted into the opening and in thermal contact with the thinned die. Herein the heat extractor is formed of a metal or an alloy.

DUAL FUNCTIONAL THERMAL PERFORMANCE SEMICONDUCTOR PACKAGE AND RELATED METHODS OF MANUFACTURING

A molded semiconductor package includes: a semiconductor die; a substrate attached to a first side of the semiconductor die; a plurality of leads electrically connected to a pad at a second side of the semiconductor die opposite the first side; a heat sink clip thermally coupled to the pad; and a molding compound encapsulating the semiconductor die, part of the leads, part of the heat sink clip, and at least part of the substrate. The molding compound has a first main side, a second main side opposite the first main side and at which the substrate is disposed, and an edge extending between the first main side and the second main side. The leads protrude from opposing first and second faces of the edge of the molding compound. The heat sink clip protrudes from opposing third and fourth faces of the edge of the molding compound.