Various embodiments may provide a semiconductor package. The semiconductor package may include a first electrical component, a second electrical component, a first heat sink, and a second heat sink bonded to a first package interconnection component and a second package interconnection component. The first package interconnection component and the second package interconnection component may provide lateral and vertical interconnections in the package.

An electronic device and method is disclosed. In one example, the electronic device includes a semiconductor chip and a leadframe. The leadframe includes a first class of leads and a second class of leads. The leads of the second class of leads are thinner than leads of the first class of leads.

One aspect relates to a method for producing a circuit carrier for a semiconductor component. At least one first copper layer or one first copper-alloy layer with a first coefficient of expansion and at least one second layer made from a second material of low expandability with a second coefficient of expansion, which is smaller than the first coefficient of expansion, are bonded to one another by means of a low-temperature sintering method at a bonding temperature of 150° C. to 300° C.

The present invention provides a semiconductor package including: a lead frame comprising at least one terminal pad and at least one first terminal lead structurally connected to the terminal pads; at least one semiconductor chip attached to the upper surfaces of the terminal pads by using a conductive first adhesive; at least one heat radiation board attached to the lower surfaces of the terminal pads by using a second adhesive; at least one second terminal lead electrically connected to the semiconductor chips, spaced apart from the terminal pads at regular intervals, and separated from the heat radiation boards; and a package housing covering parts of the first and second terminal leads, the semiconductor chips, and the terminal pads.

A power module is disclosed. A power module according to an embodiment of the present disclosure may include a first substrate and a second substrate spaced apart from each other, an electronic device unit provided on at least either one of the first and second substrates, and a lead frame unit provided between the first and second substrates. One side of the lead frame unit may be connected to an external circuit, and the other side thereof may be configured to electrically connect the first and second substrates. Accordingly, the lead frame unit may perform a function of electrically connecting the first and second substrates instead of a via spacer in the related art.

A method includes producing a semiconductor arrangement having a semiconductor layer, a first insulation layer arranged on the semiconductor layer and facing a first surface of the semiconductor arrangement, and an insulating via extending in a vertical direction through the semiconductor layer as far as the first insulation layer, the insulating via surrounding a region of the semiconductor layer in a ring-shaped fashion. The method further includes permanently securing a first carrier to the first surface of the semiconductor arrangement.

A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.

A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.

A System in Package, SiP semiconductor device includes a substrate of laser direct structuring, LDS, material. First and second semiconductor die are arranged at a first and a second leadframe structure at opposite surfaces of the substrate of LDS material. Package LDS material is molded onto the second surface of the substrate of LDS material. The first semiconductor die and the package LDS material lie on opposite sides of the substrate of LDS material. A set of electrical contact formations are at a surface of the package molding material opposite the substrate of LDS material. The leadframe structures include laser beam processed LDS material. The substrate of LDS material and the package LDS material include laser beam processed LDS material forming at least one electrically-conductive via providing at least a portion of an electrically-conductive line between the first semiconductor die and an electrical contact formation at the surface of the package molding material opposite the substrate.

A System in Package, SiP semiconductor device includes a substrate of laser direct structuring, LDS, material. First and second semiconductor die are arranged at a first and a second leadframe structure at opposite surfaces of the substrate of LDS material. Package LDS material is molded onto the second surface of the substrate of LDS material. The first semiconductor die and the package LDS material lie on opposite sides of the substrate of LDS material. A set of electrical contact formations are at a surface of the package molding material opposite the substrate of LDS material. The leadframe structures include laser beam processed LDS material. The substrate of LDS material and the package LDS material include laser beam processed LDS material forming at least one electrically-conductive via providing at least a portion of an electrically-conductive line between the first semiconductor die and an electrical contact formation at the surface of the package molding material opposite the substrate.