Patent classifications
H01L23/49805
CERAMIC SEMICONDUCTOR PACKAGE SEAL RINGS
In examples, a semiconductor package comprises a ceramic substrate and first and second metal layers covered by the ceramic substrate. The first metal layer is configured to carry signals at least in a 20 GHz to 28 GHz frequency range. The package comprises a semiconductor die positioned above the first and second metal layers and coupled to the first metal layer. The package comprises a ground shield positioned in a horizontal plane between the semiconductor die and the first metal layer, the ground shield including an orifice above a portion of the first metal layer. The package includes a metal seal ring coupled to a top surface of the ceramic substrate, the metal seal ring having a segment that is vertically aligned with a segment of the ground shield. The segment of the ground shield is between the orifice of the ground shield and a horizontal center of the ground shield. The package comprises a metal lid coupled to a top surface of the metal seal ring.
SIDE PAD ANCHORED BY NEXT ADJACENT VIA
An integrated circuit package includes a substrate including at least one electrical connection to at least one of power or ground. The package further includes a bridge structure including at least one layer of conductive material and at least one layer of insulative material. The bridge structure is configured to be coupled to the substrate such that the conductive material is electrically connected to the at least one electrical connection. The bridge structure includes a side pad made of conductive material that is electrically connected to the at least one electrical connection. The side pad is in direct contact with the conductive material and with the insulative material of the bridge structure. The side pad forms an end face of the bridge structure such that the conductive material of the side pad is exposed.
WIRING BASE AND ELECTRONIC DEVICE
A wiring base includes an insulation base having a first surface, a first differential-wiring channel, and a second differential-wiring channel. The first and the second differential-wiring channels are on the first surface and arranged side by side in a first direction. The first differential-wiring channel includes a pair of first signal conductors extending in a second direction intersecting the first direction and a pair of first grounding conductors extending along the first signal conductors with the first signal conductors being interposed therebetween. The second differential-wiring channel includes a pair of second signal conductors extending in the second direction and a pair of second grounding conductors extending along the second signal conductors with the second signal conductors being interposed therebetween. The wiring base further includes a first film extending in the second direction and positioned between first and second grounding conductors adjacent to each other in plan of the first surface.
WIRING SUBSTRATE, ELECTRONIC DEVICE, AND ELECTRONIC MODULE
A wiring substrate includes an insulating substrate including a first surface and a wiring conductor located at the insulating substrate, the insulating substrate containing multiple bulk crystallites of SiC with different polytypes. An electronic device includes the wiring substrate described above and an electronic component mounted on the wiring substrate. An electronic module includes the electronic device described above and a module substrate on which the electronic device is mounted.
Process for producing a high-frequency-compatible electronic module
The field of the invention is that of producing 3D electronic modules, compatible with components operating beyond 1 GHz. The invention relates to a 3D electronic module featuring an interconnection between a horizontal conductor and a vertical conductor to which it is connected exhibits, in a vertical plane, a non-zero curvature. It also relates to the associated production process.
Semiconductor device in which peeling off of sealing resin from the wire is suppressed
A semiconductor device and a manufacturing method of the semiconductor device by which peeling off of a sealing resin and a wire from each other can be practically suppressed are disclosed. The semiconductor device includes a substrate, a main face wire, a semiconductor element that is conductive to the main face wire, a sealing resin having resin side faces directed in a direction crossing a thickness direction, the sealing resin sealing the main face wire and the semiconductor element, a through-wire that is conductive to the main face wire and having an exposed rear face exposed from the substrate, and a column conductor that is conductive to the main face wire and having an exposed side face exposed from the resin side faces. The column conductor is supported from the opposite sides thereof in the thickness direction by the substrate and the sealing resin.
Ceramic semiconductor package seal rings
In examples, a semiconductor package comprises a ceramic substrate and first and second metal layers covered by the ceramic substrate. The first metal layer is configured to carry signals at least in a 20 GHz to 28 GHz frequency range. The package comprises a semiconductor die positioned above the first and second metal layers and coupled to the first metal layer. The package comprises a ground shield positioned in a horizontal plane between the semiconductor die and the first metal layer, the ground shield including an orifice above a portion of the first metal layer. The package includes a metal seal ring coupled to a top surface of the ceramic substrate, the metal seal ring having a segment that is vertically aligned with a segment of the ground shield. The segment of the ground shield is between the orifice of the ground shield and a horizontal center of the ground shield. The package comprises a metal lid coupled to a top surface of the metal seal ring.
Semiconductor package
A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.
ELECTRONIC PACKAGE WITH CONCAVE LEAD END FACES
An electronic package includes an electronic component including terminals, a plurality of leads, at least some of the leads being electrically coupled to the terminals within the electronic package, and a mold compound covering the electronic component and partially covering the leads. Each of the leads include an exposed bottom face coplanar with a bottom surface of the mold compound and an exposed end face coplanar with one of a plurality of side surfaces of the mold compound. For at least some of the leads, the exposed end face includes a narrow portion forming a concave recess, the narrow portion being between top and bottom edges of the exposed end face.
ELECTRONIC APPARATUS
An electronic apparatus includes a substrate including a first major surface, a second major surface, and an edge surface. The edge surface includes a radius of curvature extending between the first major surface and the second major surface. The electronic apparatus includes an opto-electronic device positioned on the first major surface. The electronic apparatus includes an electrical component positioned on the second major surface. The electronic apparatus includes a first electrically-conductive trace attached to the edge surface. The first electrically-conductive trace electrically connects a first portion of the opto-electronic device to the electrical component and defines a first current path. The electronic apparatus includes a second electrically-conductive trace extending through an opening in the substrate. The second electrically-conductive trace electrically connects a second portion of the opto-electronic device to the electrical component and defines a second current path different than the first current path.