A package structure applied to power converters can include: a first die having a first power transistor and a first control and drive circuit; a second die having a second power transistor; a connection device configured to couple the first and second power transistors in series between a high-level pin and a low-level pin of a lead frame of the package structure; and where a common node of the first and second power transistors can be coupled to an output pin of the lead frame through a metal connection structure with a low interconnection resistance.

A method comprises removing a portion of molding compound from a side of a package structure by a laser ablation process to create an opening that exposes a portion of a conductive clip, depositing solder paste on the exposed portion of the conductive clip, and reflowing the solder paste. The laser ablation process in one example is a pulsed laser ablation process that includes raster scanning a laser along a portion of the side of the package structure to create the opening. Depositing the solder paste in one example includes performing a dispense process or a screening process that deposits solder paste in the opening onto the exposed portion of the conductive clip.

A gang clip includes a plurality of clips formed from a metal each having a center region oriented along a first plane and an angled clip foot having a foot height, a length and a bend angle sufficient to electrically contact a lead terminal of the leadframe to be used to form a device. Adjacent ones of the plurality of clips are joined to one another by a first tie bar also oriented along the first plane. The first tie bar extends to a saw street region located between adjacent ones of the clips. A second tie bar attached to the first tie bar is positioned in the saw street region.

A semiconductor module includes a first semiconductor element and a second semiconductor element each having an upper-surface electrode and a lower-surface electrode, and being connected in parallel to configure an upper arm, a first conductive layer having a U-shape in planar view, having two end portions, and having an upper surface on which the first semiconductor element and the second semiconductor element are disposed in a mirror image arrangement, a positive electrode terminal having a body part and at least two positive electrode ends branched from the body part, and a negative electrode terminal having a negative electrode end disposed between the positive electrode ends. The positive electrode ends are respectively connected to one of the two end portions of the first conductive layer.

According to one embodiment, a semiconductor device includes a semiconductor chip, first and second conductive members, a first connection member, and a resin portion. The first conductive member includes first and second portions. The second portion is electrically connected to the semiconductor chip. A direction from the semiconductor chip toward the second portion is aligned with a first direction. A direction from the second portion toward the first portion is aligned with a second direction crossing the first direction. The second conductive member includes a third portion. The first connection member is provided between the first and third portion. The first connection member is conductive. The resin portion includes a first partial region. The first partial region is provided around the first and third portions, and the first connection member. The first portion has a first surface opposing the first connection member and including a recess and a protrusion.

A semiconductor device according to the present invention includes: a circuit board; a semiconductor element having a main electrode; a metal frame; and a metal plate having a flat plate shape, the metal plate being disposed between the metal frame and the main electrode, wherein the metal plate and a conductive bonding material, form a stress relaxation structure which relaxes a stress applied to metal plate and the conductive bonding material, disposed between the metal frame and the semiconductor element, and the stress relaxation structure is configured such that a thickness of the metal plate is smaller than a thickness of the metal frame, and at least one convex portion is formed on the metal plate at a position which corresponds to the main electrode. The semiconductor device according to the present invention can relax a stress applied to a conductive bonding material between a semiconductor element and a metal frame even when a relatively thick metal frame is used.

A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.

A semiconductor device including a clip, and the clip includes a clip slot, and a slug and the slug includes a groove. The clip and the slug are attached by the ultrasonic welding. The groove and the clip slot are at least partially overlapping to form a gas pathway.

A clip for connecting an electronic component with a carrier in a package is provided. The clip includes a clip body having a component connection portion configured to be connected with the electronic component to be mounted on the carrier, and a carrier connection portion configured to be connected with the carrier. The clip further includes at least one locking recess in a surface portion of the clip body, the surface portion being configured to face the carrier. The at least one locking recess is configured to accommodate material of an encapsulant of the package so as to lock the encapsulant and the clip. A corresponding method of manufacturing the package is also provided.

An electronic module has a first substrate 11; a second substrate 21 provided in one side of the first substrate 11; and a chip module 100 provided between the first substrate 11 and the second substrate 21. The chip module 100 has an electronic element 13, 23 and a connecting body 60, 70, 80 electrically connected to the electronic element 13, 23. The electronic element 13, 23 extends along a first direction that is a thickness direction of the electronic module.