Described is a semiconductor substrate stack, including: a plurality of semiconductor substrates arranged in a stack in which the semiconductor substrates include opposing facing surfaces, wherein the facing surfaces of adjacent semiconductor substrates are separated by a gap, each semiconductor substrate having an edge surface at an exposed edge of the stack. A spacer is attached to one of the facing surfaces of each of the at least one of the semiconductor substrates and extends between adjacent semiconductor substrates to define the gap and mask a central portion of each respective semiconductor substrate.

A control system controls a plurality of controllable units with a central control device and further has a plurality of control modules, each of which is assigned to one of the units to be controlled. The central control device is set up to exchange digital data with each control module. The control modules form a connection network, wherein each control module is connected to at least one other control module via a communication line so that data exchange between them is possible. One of the control modules is directly connected to the central control device as the master node of the connection network, and the control modules are set up to form a communication network within the connection network, so that the data exchange between the central control device and each control module can be respectively carried out via an assigned communication path within the communication network.

A semiconductor package includes a silicon substrate including a cavity and a plurality of through holes spaced apart from the cavity, a first semiconductor chip in the cavity, a plurality of conductive vias in the plurality of through holes, a first redistribution layer on the silicon substrate and connected to the first semiconductor chip and the conductive vias, and a second redistribution layer below the silicon substrate and connected to the first semiconductor chip and the plurality of conductive vias.

A semiconductor package structure includes a conductive structure, at least one semiconductor element, an encapsulant, a redistribution structure and a plurality of bonding wires. The semiconductor element is disposed on and electrically connected to the conductive structure. The encapsulant is disposed on the conductive structure to cover the semiconductor element. The redistribution structure is disposed on the encapsulant, and includes a redistribution layer. The bonding wires electrically connect the redistribution structure and the conductive structure.

An improved heat dissipation apparatus for limiting the temperature of multiple power semiconductors featuring flow balancers to manipulate the hydrodynamic pressure of the coolant fluid to regulate the coolant fluid flow distribution across the heat exchange fins to either create uniform flow distribution or purposefully disproportionate or custom coolant fluid flow distribution for the purpose of achieving higher heat transfer efficiency.

An RF/EMI shield has a substrate, a plurality of solder balls on a first side of the substrate, and a plurality of wire-bonds on a periphery of the first side of the substrate to form a shield which can be soldered in a surface mount process directly around components needing shielding. Each of the plurality of wire-bonds has a width selected as a fraction of the wavelength of interest.

A package structure includes a substrate, a die, an adhesive layer, a dam structure, and an encapsulant. The die is disposed on the substrate. The adhesive layer is disposed between the substrate and the die. The adhesive layer has a curved surface. The dam structure is disposed on the substrate and surrounded by the adhesive layer. The encapsulant encapsulates the die.

A semiconductor device includes a first semiconductor module and a second semiconductor module. The first semiconductor module configures an upper arm, and includes first semiconductor elements connected in parallel to each other, a sealing resin body, and a positive electrode terminal. The second semiconductor module configures a lower arm, and includes second semiconductor elements connected in parallel to each other, a sealing resin body, and a negative electrode terminal. The first and second semiconductor modules are aligned in an alignment direction. At least one of the first and second semiconductor modules has a relay terminal for electrically relaying electrodes on a low potential side of the first semiconductor elements and electrodes on a high potential side of the second semiconductor elements.

The invention relates to a three-dimensional electronic module comprising an electronic device housed between a first substrate and a second substrate, said first and second substrates being electrically and/or thermally connected to one another by at least one and preferably two heat bridges added onto and rigidly connected to said first and second substrates. The invention also relates to an electronic system comprising at least two electronic modules mounted facing one another so as to sandwich a third substrate in contact with the second substrate thereof, respectively. The third substrate is configured to provide thermal and electrical coupling between the two electronic modules via the second substrate (140) thereof.

An improved, liquid cooled, power semiconductor heat dissipation apparatus configured to accommodate surface-mount power semiconductor devices mounted on direct bond copper plates which are in thermal communication with a heat transfer surface and electrical communication with a printed circuit board or other surface on which the apparatus is mounted.