An integrated circuit (IC) structure includes a semiconductor substrate, a shallow trench isolation, and a capacitor. The STI is in the semiconductor substrate. The capacitor is over the STI. The capacitor includes first a dummy gate strip, a second dummy gate strip extending in parallel with the first dummy gate strip, a plurality of first metal contacts landing on the first dummy gate strip, and a plurality of second metal contacts landing on the second dummy gate strip.

Body-bias voltage routing structures. In an embodiment, doped well structures distribute body biasing voltages to a plurality of body biasing wells of an integrated circuit.

An example substrate includes a surface, a plurality of thin film layers disposed on the surface, and a conductive layer disposed on the surface. The conductive layer includes a bending structure. The bending structure includes a plurality of openings, where a shape of at least one opening of the plurality of openings has a first curved portion.

A display assembly includes a display component and a flexible stratum. The flexible stratum includes a first side coupled to the display component and a second side opposite to the first side. The second side includes protruding portions separate apart from each other, and one of the protruding portions includes a side section, a top section, and a tapering section extending from the side section to the top section and having a curved surface.

A display device includes a light-emitting unit and a light conversion layer. The light conversion layer is disposed on the light-emitting unit, and the light conversion layer includes plural quantum dot portions and a first shielding portion surrounding the plural quantum dot portions. One of the plural quantum dot portions has a surface and at least a part of the surface is a curved surface.

A semiconductor device includes an input clock generation circuit able to shift a write command in synchronization with a clock, and generating first and second input clocks. The semiconductor device also includes a write leveling control circuit able to divide a frequency of the clock in response to a write leveling control signal, and generating first to fourth write clocks. The semiconductor device includes a signal transfer circuit able to transfer the first and second input clocks as first and second transfer clocks in a write operation, and transferring the first to fourth write clocks as first to fourth transfer clocks in a write leveling operation.

A semiconductor device includes an input clock generation circuit able to shift a write command in synchronization with a clock, and generating first and second input clocks. The semiconductor device also includes a write leveling control circuit able to divide a frequency of the clock in response to a write leveling control signal, and generating first to fourth write clocks. The semiconductor device includes a signal transfer circuit able to transfer the first and second input clocks as first and second transfer clocks in a write operation, and transferring the first to fourth write clocks as first to fourth transfer clocks in a write leveling operation.

A semiconductor metal-oxide-semiconductor field effect transistor (MOSFET) transistor with increased on-state current obtained through intrinsic bipolar junction transistor (BJT) of MOSFET has been described. Methods of operating the MOS transistor are provided.

In an embodiment, doped well structures distribute body biasing voltages to a plurality of body biasing wells of an integrated circuit.