H01L27/14643

BURIED CHANNEL TRANSISTOR STRUCTURES AND PROCESSES
20230223413 · 2023-07-13 · ·

Transistors include trenches formed in the semiconductor substrate having a first conductive type. The trenches define, in a channel width plane of the transistor, at least one nonplanar substrate structure having a plurality of sidewall portions and a tip portion disposed between the plurality of sidewall portions. An epitaxial overlayer is epitaxially grown on the sidewall portions and the tip portion. A channel doping layer having a doped portion of the semiconductor substrate is formed in the nonplanar substrate structure and enclosed by the epitaxial overlayer. An isolation layer is disposed in the trenches and over the epitaxial overlayer. A gate is disposed on the isolation layer and extends into the trenches.

Image sensors with embedded wells for accommodating light emitters

An image sensor with embedded wells for accommodating light emitters includes a semiconductor substrate including an array of doped sensing regions respectively corresponding to an array of photosensitive pixels of the image sensor. The semiconductor substrate forms an array of wells. Each well is aligned with a respective doped sensing region to facilitate detection, by the photosensitive pixel that includes said respective doped sensing region, of light emitted to the photosensitive pixel by a light emitter disposed in the well. The image sensor further includes, between adjacent doped sensing regions, a light-blocking barrier to reduce propagation of light to the doped sensing-region of each photosensitive pixel from wells not aligned therewith.

Light sensor using pixel optical diffraction gratings having different pitches

A light sensor includes a semiconductor substrate supporting a number of pixels. Each pixel includes a photoconversion zone extending in the substrate between a front face and a back face of the substrate. An optical diffraction grating is arranged over the back face of the substrate at a position facing the photoconversion zone of the pixel. For at least two different pixels of the light sensor, the optical diffraction gratings have different pitches. Additionally, the optical grating of each pixel is surrounded by an opaque wall configured to absorb at operating wavelengths of the sensor.

Image pickup element and image pickup apparatus
11699717 · 2023-07-11 · ·

An image pickup element using an APD is provided. The image pickup element has a first substrate, a second substrate, and a connector. The first substrate is provided with a plurality of light receivers having the APD. The second substrate has a pixel circuit that corresponds to each of the APDs. Additionally, the connector electrically connects the APD and the pixel circuit corresponding to the APD.

Selective nitrided gate-oxide for RTS noise and white-pixel reduction
11700464 · 2023-07-11 · ·

A pixel cell includes a nitrogen-implanted region at a semiconductor material-gate oxide proximate interface located in a region above a photodiode. The pixel cell is further devoid of implanted nitrogen in channel regions of a plurality of pixel transistors. Thus, Si—N bonds are formed at the semiconductor material-gate oxide interface in the region above the photodiode, while the channel regions are protected from nitrogen implantation at the semiconductor material-gate oxide interface. Methods of forming the pixel cell are also described.

IMAGE SENSOR USING TRANSFER GATE SIGNAL HAVING THREE VOLTAGE LEVELS, AND METHOD OF OPERATING THE SAME

A method of operating an image sensor includes accumulating first charges through a photo diode, applying a first transfer gate signal having a first voltage level to a transfer transistor, performing, through a reset transistor, a first reset operation on a floating diffusion node connected with the reset transistor and the transfer transistor, changing the first voltage level of the first transfer gate signal to a second voltage level higher than the first voltage level, during the first reset operation, changing the second voltage level of the first transfer gate signal to a third voltage level higher than the second voltage level, and changing the third voltage level of the first transfer gate signal to the second voltage level.

Passivation scheme for image sensor substrate

The present disclosure relates to an integrated chip including a substrate. A photodetector is arranged within the substrate. A trench isolation structure extends into the substrate on opposite sides of the photodetector. The trench isolation structure separates the photodetector from neighboring photodetectors. A first passivation layer is between a sidewall of the substrate and a sidewall of the trench isolation structure. The first passivation layer includes hydrogenated amorphous silicon.

Flip-chip mounting of optoelectronic chips
11699715 · 2023-07-11 · ·

An optoelectronic assembly includes an integrated circuit (IC) chip including, on its front side, a photoconversion region and first electrical contact pads disposed alongside the photoconversion region. A circuit substrate contains a cavity into which the IC chip is inserted through the lower side and has a window opening through the upper side in communication with the cavity such that the photoconversion region of the IC chip is exposed through the window. The circuit substrate includes electrical circuit traces, which include second electrical contact pads disposed within the cavity alongside the window so as to contact the first electrical contact pads on the front side of the IC chip within the cavity. A base includes a stiff, heat-conducting material, to which the lower side of the circuit substrate is fixed. A malleable heat-conducting layer is compressed between the rear side of the IC chip and the base.

HIGH-SPEED LIGHT SENSING APPARATUS III

A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

SOLID-STATE IMAGE PICKUP ELEMENT AND IMAGE PICKUP APPARATUS
20230217130 · 2023-07-06 ·

There is provided a solid-state image pickup element including: a photodiode configured to convert incident light into a photocurrent; an amplification transistor configured to amplify a voltage between a gate having a potential depending on the photocurrent and a source having a predetermined reference potential and output the amplified voltage from a drain; and a potential supply section configured to supply an anode of the photodiode and a back-gate of the amplification transistor with a predetermined potential lower than the reference potential.