Provided are an optical fingerprint apparatus and an electronic device, applied to an electronic device having a display screen, where the optical fingerprint apparatus is configured to be disposed under the display screen, and the optical fingerprint apparatus includes: an optical fingerprint chip, where the optical fingerprint chip is configured to receive a fingerprint light signal returned from a finger above the display screen, and the fingerprint light signal is used to obtain a fingerprint image of the finger; and a light blocking layer formed on an upper surface of an edge region of the optical fingerprint chip, where the light blocking layer partially blocks the edge region of the optical fingerprint chip and does not block a sensing region of the optical fingerprint chip, and the light blocking layer is configured to block interference light entering the sensing region from the edge region of the optical fingerprint chip.

Provided is an opto-electronic device including a semiconductor substrate doped with a first conductivity type impurity, a source region and a drain region provided on the semiconductor substrate spaced apart from each other and doped with a second conductivity type impurity which is electrically opposite to the first conductivity type impurity, a first electrode and a second electrode electrically connected to the source region and the drain region, respectively, a quantum dot layer provided between the source region and the drain region on the semiconductor substrate and including quantum dots, a first insulation layer configured to insulate the semiconductor substrate and the quantum dot layer from each other, and a transparent electrode layer provided on the quantum dot layer.

An imaging element includes a photoelectric conversion section 23 including a first electrode 21, a photoelectric conversion layer 23A including an organic material, and a second electrode 22 that are stacked. An inorganic oxide semiconductor material layer 23B including a first layer 23C and a second layer 23D, from side of the first electrode, is formed between the first electrode 21 and the photoelectric conversion layer 23A, and ρ.sub.1≥5.9 g/cm.sup.3 and ρ.sub.1−ρ.sub.2≥0.1 g/cm.sup.3 are satisfied, where ρ.sub.1 is an average film density of the first layer 23C and ρ.sub.2 is an average film density of the second layer 23D in a portion extending for 3 nm from an interface between the first electrode 21 and the inorganic oxide semiconductor material layer 23B.

A solid-state image pickup unit includes: a substrate made of a first semiconductor; a substrate made of a first semiconductor; a photoelectric conversion device provided on the substrate and including a first electrode, a photoelectric conversion layer, and a second electrode in order from the substrate; and a plurality of field-effect transistors configured to perform signal reading from the photoelectric conversion device. The plurality of transistors include a transfer transistor and an amplification transistor, the transfer transistor includes an active layer containing a second semiconductor with a larger band gap than that of the first semiconductor, and one terminal of a source and a drain of the transfer transistor also serves the first electrode or the second electrode of the photoelectric conversion device, and the other terminal of the transfer transistor is connected to a gate of the amplification transistor.

A sensor chip and an electronic device with SPAD pixels each including an avalanche photodiode element. The sensor chip includes a pixel area having an array of pixels, an avalanche photodiode element that amplifies a carrier by a high electric field area provided for the each of the pixels, an inter-pixel separation section that insulates and separates each of the pixels from adjacent pixels, and a wiring in a wiring layer laminated on a surface opposite to a light receiving surface of the semiconductor substrate that covers at least the high electric field area. The pixel array includes a dummy pixel area located near a peripheral edge of the pixel area. A cathode and an anode electric potential of the avalanche photodiode element arranged in the dummy pixel area are the same, or at least one of the cathode and anode electric potential is in a floating state.

A pixel includes a first electrode layer on an exposed surface of an interconnection structure and in contact with a conductive element of the interconnection structure. An insulating layer extends over the first electrode layer and includes opening crossing through the insulating layer to the first electrode layer. A second electrode layer is on top of and in contact with the first electrode layer and the insulating layer in the opening. A film configured to convert photons into electron-hole pairs is on the insulating layer, the second electrode layer and filling the opening. A third electrode layer covers the film.

A read-out speed is increased. A solid-state imaging device (100) according to an embodiment is a solid-state imaging device including a plurality of photoelectric conversion elements (PD3) arrayed in a matrix, and each of the photoelectric conversion elements includes: a first electrode and a second electrode (112, 117) that are disposed such that principal planes thereof face each other; a photoelectric conversion film (113) that is disposed between the first electrode and the second electrode; a semiconductor layer (114) that is disposed between the photoelectric conversion film and the second electrode and is configured such that a first surface is in contact with the photoelectric conversion film and at least a portion of a second surface on a side opposite to the first surface is in contact with the second electrode; an insulating film (316) that is disposed within the semiconductor layer; and a third electrode (115) that is disposed within the insulating film.

An HMD includes a single photon avalanche diode (SPAD) array comprising a plurality of SPAD pixels. The HMD also includes a display positioned to display images for viewing by an eye of a user. The HMD also includes one or more processors and one or more hardware storage devices storing instructions that are executable by the one or more processors to configure the HMD to perform various acts associated with using the SPAD array to capture an image frame of an environment for display to the user.

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-K dielectric material.

Devices, systems, and methods are provided for reducing electrical and optical crosstalk in photodiodes. A photodiode may include a first layer with passive material, the passive material having no electric field. The photodiode may include a second layer with an absorbing material, the second layer above the first layer. The photodiode may include a diffused region with a buried p-n junction. The photodiode may include an active region with the buried p-n junction and having an electric field greater than zero. The photodiode may include a plateau structure based on etching through the second layer to the first layer, the etching performed at a distance of fifteen microns or less from the buried p-n junction.