Disclosed is a tunneling diode, which includes a graphene-silicon quantum dot hybrid structure, having improved performance and electrical characteristics by controlling the sizes of silicon quantum dots and the doping concentration of graphene. The ideal tunneling diode of the present disclosure may be utilized in diode-based optoelectronic devices.

This invention includes multiple quantum well and quantum dot channel FETs, which can process multi-state/multi-bit logic, and multibit-bit inverters configured as static random-access memories (SRAMs). SRAMs can be implemented as flip-flops and registers. In addition, multiple quantum well and quantum dot channel structures are configured to function as multi-bit high-speed quantum dot (QD) random access memories (NVRAMs). Multi-bit Logic, SRAMs and QD-NVRAMs are spatially located on a chip, depending on the application, to provide a low-power consumption and high-speed hardware platform. The multi-bit logic, SRAM and register, and QD-NVRAM are implemented on a single chip in a CMOS-like platform for applications including artificial intelligence (AI) and machine learning.

An apparatus comprising: a channel (4) configured to conduct charge carriers; and a charge carrier generator (22) configured to generate charge carriers for populating the channel, wherein the charge carrier generator is configured for resonance energy transfer (FRET). The charge carrier generator may be a nanoparticle or quantum dot (22), functionalised with at least one moiety (28A, 28B) to enable detection of an analyte. The charge carrier generator may also be a nanoparticle or quantum dot (22) configured to photo-generate charge carriers. The channel (4) may be made of a material having a very high carrier mobility like graphene or carbon nanotubes.

The disclosure describes an adaptive and optimal imaging of individual quantum emitters within a lattice or optical field of view for quantum computing. Advanced image processing techniques are described to identify individual optically active quantum bits (qubits) with an imager. Images of individual and optically-resolved quantum emitters fluorescing as a lattice are decomposed and recognized based on fluorescence. Expected spatial distributions of the quantum emitters guides the processing, which uses adaptive fitting of peak distribution functions to determine the number of quantum emitters in real time. These techniques can be used for the loading process, where atoms or ions enter the trap one-by-one, for the identification of solid-state emitters, and for internal state-detection of the quantum emitters, where each emitter can be fluorescent or dark depending on its internal state. This latter application is relevant to efficient and fast detection of optically active qubits in quantum simulations and quantum computing.

A thin film transistor 101 includes: an active layer 7 that is supported on a substrate 1 and includes a first region 7S, a second region 7D and a channel region 7C located between the first region and the second region; a gate electrode 11 that is arranged so as to overlap with at least the channel region of the active layer 7 with a gate insulating layer 9 therebetween; a source electrode 15s electrically connected to the first region 7S; and a drain electrode 15d electrically connected to the second region 7D, at least the channel region 7C of the active layer 7 having a layered structure that includes a first metal layer m1 arranged on a lower oxide semiconductor layer 71 and containing substantially no oxygen, and an upper oxide semiconductor layer 72 arranged on the first metal layer m1, wherein a thickness of the first metal layer m1 is smaller than a thickness of the lower oxide semiconductor layer 71 or the upper oxide semiconductor 72.

Disclosed herein are single electron transistor (SET) devices, and related methods and devices. In some embodiments, a SET device may include: first and second source/drain (S/D) electrodes; a plurality of islands, disposed between the first and second S/D electrodes; and dielectric material disposed between adjacent ones of the islands, between the first S/D electrode and an adjacent one of the islands, and between the second S/D electrode and an adjacent one of the islands.

Disclosed herein are quantum dot devices with trenched substrates, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate having a trench disposed therein, wherein a bottom of the trench is provided by a first material, and a quantum well stack at least partially disposed in the trench. A material of the quantum well stack may be in contact with the bottom of the trench, and the material of the quantum well stack may be different from the first material.

Disclosed herein are lateral gate material arrangements for quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; and a gate above the quantum well stack, wherein the gate includes a gate electrode, the gate electrode includes a first material proximate to side faces of the gate and a second material proximate to a center of the gate, and the first material has a different material composition than the second material.

A process for fabricating an electronic component with multiple quantum dots is provided, including providing a stack including a substrate, a nanostructure made of semiconductor material superposed over the substrate and including first and second quantum dots and a link linking the quantum dots, first and second control gate stacks arranged on the quantum dots, the gate stacks separated by a gap, the quantum dots and the link having a same thickness; partially thinning the link while using the gate stacks as masks to obtain the link, a thickness of which is less than that of the quantum dots; and conformally forming a dielectric layer on either side of the gate stacks so as to fill the gap above the partially thinned link. An electronic component with multiple quantum dots is also provided.

A quantum information processing device including a semiconductor substrate. An optical resonator is coupled to the substrate. The optical resonator supports a first photonic mode with a first resonator frequency. The quantum information processing device includes a non-gaseous chalcogen donor atom disposed within the semiconductor substrate and optically coupled to the optical resonator. The donor atom has a transition frequency in resonance with the resonator frequency. Also disclosed herein are systems, devices, articles and methods with practical application in quantum information processing including or associated with one or more deep impurities in a silicon substrate optically coupled to an optical structure.