Patent classifications
H01L29/1606
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
A semiconductor device includes a substrate, a 2-D material layer, source/drain contacts, and a gate electrode. The 2-D material layer is over the substrate, the 2-D material layer includes source/drain regions and a channel region between the source/drain regions, in which the 2-D material layer is made of a transition metal dichalcogenide (TMD). The source/drain contacts are in contact with source/drain regions of the 2-D material layer, in which a binding energy of transition metal atoms at the channel region of the 2-D material layer is different from a binding energy of the transition metal atoms at the source/drain regions of the 2-D material layer. The gate electrode is over the substrate.
Ultra-compact, passive, wireless sensor using quantum capacitance effect in graphene
An electrical device includes at least one graphene quantum capacitance varactor. In some examples, the graphene quantum capacitance varactor includes an insulator layer, a graphene layer disposed on the insulator layer, a dielectric layer disposed on the graphene layer, a gate electrode formed on the dielectric layer, and at least one contact electrode disposed on the graphene layer and making electrical contact with the graphene layer. In other examples, the graphene quantum capacitance varactor includes an insulator layer, a gate electrode recessed in the insulator layer, a dielectric layer formed on the gate electrode, a graphene layer formed on the dielectric layer, wherein the graphene layer comprises an exposed surface opposite the dielectric layer, and at least one contact electrode formed on the graphene layer and making electrical contact with the graphene layer.
Nano-dynamic biosensor and fabrication method therefor
The present invention relates to a nano-dynamic biosensor and a fabrication method therefor. A biosensor according to the present invention comprises a substrate having a hollow structure and a graphene layer formed thereon wherein a probe material is bound to the surface of the graphene layer and the resonance vibration of the hollow structure formed in the substrate is modulated as the probe material increases in weight when a target material to be detected is coupled to the probe material without being labeled, whereby the biosensor is expected to take advantage of the modulation to measure the coupling of the target material including vaccinia virus with high sensitivity on a femtogram (10.sup.−15 g) level.
MOSFET WITH SATURATION CONTACT AND METHOD FOR FORMING A MOSFET WITH SATURATION CONTACT
A MOSFET with saturation contact. The MOSFET with saturation contact includes an n-doped source region, a source contact, a contact structure, which extends from the source contact to the n-doped source region, and forms with the source contact a first conductive connection and forms with the n-doped source region a second conductive connection, a barrier layer and an insulating layer. The contact structure includes a section between the first conductive connection and the second conductive connection, which is embedded between the barrier layer and the dielectric layer and is configured in such a way that a two-dimensional electron gas is formed therein.
Nanowire transistor and method for fabricating the same
A method for fabricating a nanowire transistor includes the steps of first forming a nanowire channel structure on a substrate, in which the nanowire channel structure includes first semiconductor layers and second semiconductor layers alternately disposed over one another. Next, a gate structure is formed on the nanowire channel structure and then a source/drain structure is formed adjacent to the gate structure, in which the source/drain structure is made of graphene.
Integrated Assemblies Having Graphene-Containing-Structures
Some embodiments include an integrated assembly having a first graphene-containing-material offset from a second graphene-containing-material. The first graphene-containing-material includes a first graphene-layer-stack with first metal interspersed therein. The second graphene-containing-material includes a second graphene-layer-stack with second metal interspersed therein. A conductive interconnect couples the first and second graphene-containing materials to one another.
Semiconductor device having stacked structure with two-dimensional atomic layer
A semiconductor device is provided and includes a substrate and a stack on the substrate. The stack includes plural active layers that are vertically stacked and spaced apart from each other, and plural gate electrodes that are on the active layers, respectively, and vertically stacked. Each active layer includes a channel layer under a corresponding one of the gate electrodes, and a source/drain layer disposed at a side of the channel layer and electrically connected to the channel layer. The channel layer is made of a two-dimensional atomic layer of a first material.
Electronic device and method of manufacturing the same
Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp.sup.2 bonding structure.
Field effect transistor including channel formed of 2D material
A field effect transistor includes a substrate, a source electrode and a drain electrode on the substrate and apart from each other in a first direction, a plurality of channel layers, a gate insulating film surrounding each of the plurality of channel layers, and a gate electrode surrounding the gate insulating film. Each of the plurality of channel layers has ends contacting the source electrode and the drain electrode. The plurality of channel layers are spaced apart from each other in a second direction away from the substrate. The plurality of channel layers include a 2D semiconductor material.
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
A method forms a part of a power semiconductor device. The method includes homoepitaxially forming two silicon carbide layers on a first side of a silicon carbide substrate and forming a pattern of pits on a second side of the silicon carbide substrate. The two layers include a buffer layer, on the first side of the silicon carbide substrate, and have a same doping type of the silicon carbide substrate and a doping concentration equal to or greater than 10.sup.17 cm.sup.−3 in order to increase the quality of at least one subsequent SiC layer. The two layers include an etch stopper layer, being deposited on the buffer layer and has a same doping type as the buffer layer but a lower doping concentration in order to block a trenching process. The pattern of pits, obtained by electrochemical etching, extends completely thorough the silicon carbide substrate and the buffer layer.