Disclosed are a Schottky diode and a manufacturing method thereof. The Schottky diode includes a substrate, a first semiconductor layer, a heterostructure layer, a passivation layer, and a cap layer stacked in sequence. The passivation layer includes a first groove and a second groove, and the first groove and the second groove penetrate through at least the passivation layer. A first electrode is arranged at least on the cap layer corresponding to the first groove; a second electrode is arranged in the second groove. A Schottky contact is formed between the first electrode and the cap layers, so that a direct contact area between the first electrode and the heterostructure layer may be avoided, a contradiction between the forward turn-on voltage and the reverse leakage of the Schottky diode may be balanced, and a leakage characteristic of the heterostructure layer in a high temperature environment may be suppressed.

Disclosed are a Schottky diode and a manufacturing method thereof. The Schottky diode includes a substrate, a first semiconductor layer, a heterostructure layer, a passivation layer, and a cap layer stacked in sequence. The passivation layer includes a first groove and a second groove, and the first groove and the second groove penetrate through at least the passivation layer. A first electrode is arranged at least on the cap layer corresponding to the first groove; a second electrode is arranged in the second groove. A Schottky contact is formed between the first electrode and the cap layers, so that a direct contact area between the first electrode and the heterostructure layer may be avoided, a contradiction between the forward turn-on voltage and the reverse leakage of the Schottky diode may be balanced, and a leakage characteristic of the heterostructure layer in a high temperature environment may be suppressed.

The present invention provides a GaN/two-dimensional AlN heterojunction rectifier on a silicon substrate and a preparation method therefor and belongs to the field of rectifiers. The rectifier comprises a silicon substrate, a GaN buffer layer, a carbon-doped semi-insulating GaN layer, a two-dimensional AlN layer, a non-doped GaN layer, a non-doped InGaN layer and a SiN.sub.x passivation layer that are stacked in sequence. The rectifier further comprises a mesa isolation groove and a Schottky contact electrode that are arranged at one side. The mesa isolation groove is in contact with the non-doped GaN layer, the non-doped InGaN layer, the SiN.sub.x passivation layer and the Schottky contact electrode. The Schottky contact electrode is in contact with the mesa isolation groove and the non-doped GaN layer. The thickness of the two-dimensional AlN layer is only several atomic layers, thus the received stress and polarization intensity are greater than those of the AlGaN layer.

InGaN offers a route to high efficiency overall water splitting under one-step photo-excitation. Further, the chemical stability of metal-nitrides supports their use as an alternative photocatalyst. However, the efficiency of overall water splitting using InGaN and other visible light responsive photocatalysts has remained extremely low despite prior art work addressing optical absorption through band gap engineering. Within this prior art the detrimental effects of unbalanced charge carrier extraction/collection on the efficiency of the four electron-hole water splitting reaction have remained largely unaddressed. To address this growth processes are presented that allow for controlled adjustment and establishment of the appropriate Fermi level and/or band bending in order to allow the photochemical water splitting to proceed at high rate and high efficiency. Beneficially, establishing such material surface charge properties also reduces photo-corrosion and instability under harsh photocatalysis conditions.

InGaN offers a route to high efficiency overall water splitting under one-step photo-excitation. Further, the chemical stability of metal-nitrides supports their use as an alternative photocatalyst. However, the efficiency of overall water splitting using InGaN and other visible light responsive photocatalysts has remained extremely low despite prior art work addressing optical absorption through band gap engineering. Within this prior art the detrimental effects of unbalanced charge carrier extraction/collection on the efficiency of the four electron-hole water splitting reaction have remained largely unaddressed. To address this growth processes are presented that allow for controlled adjustment and establishment of the appropriate Fermi level and/or band bending in order to allow the photochemical water splitting to proceed at high rate and high efficiency. Beneficially, establishing such material surface charge properties also reduces photo-corrosion and instability under harsh photocatalysis conditions.

A high electron mobility transistor (HEMT) includes a substrate, a P-type III-V composition layer, a gate electrode and a carbon containing layer. The P-type III-V composition layer is disposed on the substrate, and the gate electrode is disposed on the P-type III-V composition layer. The carbon containing layer is disposed under the P-type III-V composition layer to function like an out diffusion barrier for preventing from the dopant within the P-type III-V composition layer diffusing into the stacked layers underneath during the annealing process.

Electron gas transistor of normally open type, includes a first semiconductor layer laid out along a layer plane and a second semiconductor layer formed on the first semiconductor layer and laid out along the layer plane, the first and second semiconductor layers forming an electron gas layer at the interface thereof; a third semiconductor layer with P type doping formed on the second semiconductor layer and laid out along the layer plane, a first zone with N type doping of which a part is arranged within the thickness of the third semiconductor layer, the first zone-delimiting a source zone; a second zone with N or metal type doping having at least one part arranged in the second semiconductor layer; a source electrode formed on the source zone; a drain electrode formed on the first semiconductor layer; and a gate located between the source electrode and the second zone.

Electron gas transistor of normally open type, includes a first semiconductor layer laid out along a layer plane and a second semiconductor layer formed on the first semiconductor layer and laid out along the layer plane, the first and second semiconductor layers forming an electron gas layer at the interface thereof; a third semiconductor layer with P type doping formed on the second semiconductor layer and laid out along the layer plane, a first zone with N type doping of which a part is arranged within the thickness of the third semiconductor layer, the first zone-delimiting a source zone; a second zone with N or metal type doping having at least one part arranged in the second semiconductor layer; a source electrode formed on the source zone; a drain electrode formed on the first semiconductor layer; and a gate located between the source electrode and the second zone.

An integrated circuit structure comprises a base layer that includes a channel region, wherein the base layer and the channel region include group III-V semiconductor material. A polarization layer stack is over the base layer, wherein the polarization layer stack comprises a buffer stack, an interlayer over the buffer stack, a polarization layer over the interlayer. A cap layer stack is over the polarization layer to reduce transistor access resistance.

An integrated circuit structure comprises a base layer that includes a channel region, wherein the base layer and the channel region include group III-V semiconductor material. A polarization layer stack is over the base layer, wherein the polarization layer stack comprises a buffer stack, an interlayer over the buffer stack, a polarization layer over the interlayer. A cap layer stack is over the polarization layer to reduce transistor access resistance.