Integrated circuit structures are described that include back end memory devices that are integrated into one or more back end interconnect layers of an integrated circuit. Examples of the back end memory devices described include one transistor and one capacitor (1T/1C) memory cell devices that use an oxide semiconductor layer (e.g., indium gallium zinc oxide) as an element of the transistor portion (1T) of the back end memory cell. This produces a memory device with a low off state leakage current, improving memory device performance while also reducing memory device size.

A semiconductor memory device includes a first conductive layer, a semiconductor layer extending in a first direction and being opposed to the first conductive layer, and a gate insulating film disposed between the first conductive layer and the semiconductor layer. The first conductive layer includes a first region, a second region disposed between the first region and the gate insulating film, and a third region disposed between the first region and the first interlayer insulating layer. The first to the third regions contain a metal. The third region contains silicon (Si). The first region does not contain silicon (Si) or has a lower silicon (Si) content than a silicon (Si) content in the third region. The second region does not contain silicon (Si) or has a lower silicon (Si) content than the silicon (Si) content in the third region.

An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios satisfying formulae (1) to (3): 0.01Ga/(In+Ga+Sn)0.30 . . . (1); 0.01Sn/(In+Ga+Sn)0.40 . . . (2); and 0.55In/(In+Ga+Sn)0.98 . . . (3), and Al at an atomic ratio satisfying a formula (4): 0.05Al/(In+Ga+Sn+Al)0.30 . . . (4).

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

There is provided an oxide semiconductor film composed of nanocrystalline oxide or amorphous oxide, wherein the oxide semiconductor film includes indium, tungsten and zinc, a content rate of tungsten to a total of indium, tungsten and zinc in the oxide semiconductor film is higher than 0.5 atomic % and equal to or lower than 5 atomic %, and an electric resistivity is equal to or higher than 10.sup.1 cm. There is also provided a semiconductor device including the oxide semiconductor film.

An array substrate, its manufacturing method, and a liquid crystal display panel employing the array substrate are disclosed. The present disclosure forms an amorphous silicon layer, as a layer of protection, on the Thin Film Transistor (TFT) active layer so that, during the formation of the source and drain patterns by etching, the amorphous silicon layer ensures the electrical properties of the TFT channels by preventing the etching solution from contacting the active layer and thereby damaging the TFT channels.

A semiconductor element and a method for manufacturing a semiconductor element improving heat dissipation are provided. A semiconductor element includes a Ga.sub.2O.sub.3(gallium oxide) substrate, a single-crystal SiC layer formed at one principal surface side of the Ga.sub.2O.sub.3 substrate, and a Schottky electrode formed at the one principal surface side of the Ga.sub.2O.sub.3 substrate and controls current flowing inside the Ga.sub.2O.sub.3 substrate.

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.