A semiconductor device includes a substrate, a two-dimensional (2D) material layer formed on the substrate and having a first region and a second region adjacent to the first region, and a source electrode and a drain electrode provided to be respectively in contact with the first region and the second region of the 2D material layer, the second region of the 2D material layer including an oxygen adsorption material layer in which oxygen is adsorbed on a surface of the second region.

Disclosed is a graphene-based ternary barristor using a Schottky junction graphene semiconductor. A graphene channel layer is doped with N-type and N-type dopants to have two different Fermi levels and form a PN junction. Accordingly, a voltage is applied to a gate electrode layer to move the Fermi levels of the graphene channel layer and adjust the height of the Schottky barrier, thus generating current. Also, the height of the Schottky barrier is adjusted depending on the doping concentration of the graphene channel That is, the height of the Schottky barrier is changed depending on the applied gate voltage, and thus the flow of current is changed. Also, it is possible to adjust the height of the Schottky barrier by adjusting the doping concentration of the graphene channel. Accordingly, since the graphene-based ternary barristor has a high current ratio by adjusting a gate voltage, the graphene-based ternary barristor may be applied to a logic circuit.

A field effect transistor (FET) includes a gate dielectric layer, a two-dimensional (2D) channel layer formed on the gate dielectric layer and a gate electrode. The 2D channel layer includes a body region having a first side and a second side opposite to the first side, the body region being a channel of the FET. The 2D channel layer further includes first finger regions each protruding from the first side of the body region and second finger regions each protruding from the second side of the body region. A source electrode covers the first finger regions, and a drain electrode covers the second finger regions.

The present invention provides a semiconductor structure having a multiple-porous graphene layer, comprising a semiconductor substrate, a multiple-porous graphene layer, and a gallium nitride layer. And, the present invention provides that the fabrication method for forming the semiconductor structure having a multiple-porous graphene layer, comprises: firstly, growing up the graphene on the copper foil; then, using the acetone and isopropyl alcohol to wash the semiconductor substrate, and then using the nitrogen flow to dry up; transferring the graphene onto the semiconductor substrate, using the Poly(methyl methacrylate)to fix the multiple-porous graphene layer, and using the acetone to wash up; using the photolithography process to etch the whole surface of the multiple-porous graphene layer; and, using the metalorganic chemical vapor deposition to deposit gallium nitride on the multiple-porous graphene layer and the semiconductor substrate.

In various embodiments, a method for processing a carrier is provided. The method for processing a carrier may include: forming a first catalytic metal layer over a carrier; forming a source layer over the first catalytic metal layer; forming a second catalytic metal layer over the source layer, wherein the thickness of the second catalytic metal layer is larger than the thickness of the first catalytic metal layer; and subsequently performing an anneal to enable diffusion of the material of the source layer forming an interface layer adjacent to the surface of the carrier from the diffused material of the source layer.

Methods of forming a graphene nanopattern, graphene-containing devices, and methods of manufacturing the graphene-containing devices are provided. A method of forming the graphene nanopattern may include forming a graphene layer on a substrate, forming a block copolymer layer on the graphene layer and a region of the substrate exposed on at least one side of the graphene layer, forming a mask pattern from the block copolymer layer by removing one of a plurality of first region and a plurality of second regions of the block copolymer, and patterning the graphene layer in a nanoscale by using the mask pattern as an etching mask. The block copolymer layer may be formed to directly contact the graphene layer. The block copolymer layer may be formed to directly contact a region of the substrate structure that is exposed on at least one side of the graphene layer.