Provided is a semiconductor apparatus having a MOS gate structure, comprising: a semiconductor substrate; a first interlayer dielectric film provided above an upper surface of the semiconductor substrate and including a first opening; and a second interlayer dielectric film stacked on the first interlayer dielectric film and including a second opening overlapping the first opening in a top view, wherein a width of the first opening in a first direction is different from a width of the second opening in the first direction, at a boundary height between the first interlayer dielectric film and the second interlayer dielectric film.

A semiconductor device capable of obtaining the threshold voltage of a transistor is provided. The semiconductor device includes a first transistor, a first capacitor, a first output terminal, a first switch, and a second switch. A gate and a source of the first transistor are electrically connected to each other. A first terminal of the first capacitor is electrically connected to the source. A second terminal and the first output terminal of the first capacitor are electrically connected to a back gate of the first transistor. The first switch controls input of a first voltage to the back gate. A second voltage is input to a drain of the first transistor. The second switch controls input of a third voltage to the source.

An oxide crystal includes an oxide having a rutile-type structure. The oxide crystal is oriented to a crystallographic axis direction perpendicular to or parallel to a c-axis, and an atomic ratio of germanium in a metal element in the oxide crystal is greater than 0.5. A crystalline oxide film contains an oxide of germanium. A crystalline multilayer structure includes a crystal substrate, and a crystalline oxide film layered on the crystal substrate. The crystal substrate has a tetragonal crystal structure, and an atomic ratio of germanium in a metal element in the crystalline oxide film is greater than 0.5. A manufacturing method includes atomizing or forming droplets of a raw material solution containing germanium, supplying a carrier gas to the atomized droplets, and carrying the atomized droplets onto a crystal substrate having a tetragonal crystal structure and simultaneously causing the atomized droplets to thermally react on the crystal substrate.

The semiconductor device includes a chip which has a main surface, a diode region which is arranged in the main surface, trench structures which are formed in the main surface at an interval in the diode region, the trench structures each having an electrode structure including an upper electrode and a lower electrode which are embedded in a trench across an insulator in an up/down direction, and a diode which has a pn-junction portion that is formed in a surface layer portion of the main surface at a region between the trench structures.

A semiconductor apparatus includes an Si substrate and a ferroelectric thin film. The ferroelectric thin film is formed on the Si substrate. The ferroelectric thin film includes HfN.sub.x (1<x) having a rhombohedral crystal structure.

A resistor may include a semiconductor layer having a source region, a drain region, and a channel region. The channel region may be between the source region and the drain region. The channel region may have a same polarity as the source region and the drain region. The resistor may further include a first inter-metal dielectric (IMD) layer on the channel region. The resistor may further include a front-side gate shield on the first IMD layer. The front-side gate shield may overlap the channel region.

A resistor may include a semiconductor layer having a source region, a drain region, and a channel region. The channel region may be between the source region and the drain region. The channel region may have a same polarity as the source region and the drain region. The resistor may further include a first inter-metal dielectric (IMD) layer on the channel region. The resistor may further include a front-side gate shield on the first IMD layer. The front-side gate shield may overlap the channel region.

If a thickness of an Si substrate is d.sub.t [cm], a resistivity of the Si substrate is ?.sub.s [?.Math.cm], a width of each trench is W.sub.t [cm], a thickness of a first electrode formed on a side surface of each trench is t.sub.m [cm], a resistivity of the first electrode is ?.sub.m [?.Math.cm], an interface resistance between the first electrode and the Si substrate is R.sub.ms [?.Math.cm.sup.2], an interface resistance between the first electrode and a drift layer is R.sub.mg [?.Math.cm.sup.2], an interface resistance between the Si substrate and the drift layer is R.sub.sg [?.Math.cm.sup.2], a total number of the trenches is n, a length of the Si substrate in the predetermined direction is W.sub.x [cm], and ?=n.Math.W.sub.t/W.sub.x, a ratio t.sub.m/W.sub.t of the t.sub.m with respect to the W.sub.t satisfies a condition of a formula (a) shown below.

[00001]$\begin{array}{cc}{t}_m/W_t>{?}_m.Math.d_t/\left\{2?\left(R_{ms}+{?}_s.Math.d_t+R_{\mathrm{sg}}\right)-2R_{\mathrm{mg}}\right\}& \left(a\right)\end{array}$

Provided a multilayer structure including at least: a semiconductor layer containing a crystalline oxide semiconductor as a major component; and a conductive substrate layered on the semiconductor layer, wherein the multilayer structure has a first direction in a plane perpendicular to a layering direction of the multilayer structure and a second direction perpendicular or substantially perpendicular to the first direction, and a first coefficient of linear expansion being a coefficient of linear expansion in the first direction of the conductive substrate is smaller than a second coefficient of linear expansion being a coefficient of linear expansion in the second direction of the conductive substrate, and a third coefficient of linear expansion being a coefficient of linear expansion in the first direction of the semiconductor layer is smaller than a fourth coefficient of linear expansion being a coefficient of linear expansion in the second direction of the semiconductor layer.

Provided is a multilayer structure including at least: a semiconductor layer containing a crystalline oxide semiconductor as a major component; and a conductive substrate layered on the semiconductor layer, wherein the conductive substrate includes at least a first metal and a second metal different from the first metal, the conductive substrate has a first direction and a second direction perpendicular or substantially perpendicular to the first direction in a plane, and a first coefficient of linear expansion being a coefficient of linear expansion in the first direction of the conductive substrate and a second coefficient of linear expansion being a coefficient of linear expansion in the second direction are identical or substantially identical.