A semiconductor device includes a first conductive type semiconductor layer which has a principal surface, a second conductive type well region which demarcates an active region and an outer region on the principal surface and is formed on a surface layer portion of the principal surface and includes a high concentration portion high in impurity concentration on the active region side and includes a low concentration portion lower in impurity concentration than the high concentration portion on the outer region side, and a second conductive type impurity region of the active region which is formed on a surface layer portion of the principal surface.

A semiconductor device includes: a substrate; and an n-type layer including a nitride semiconductor formed on the surface of the substrate. In the n-type layer, the concentration of donor impurities (excluding O) is 1×10.sup.15 cm.sup.−3 or more and 1×10.sup.20 cm.sup.−3 or less, the concentration of C impurities is 1×10.sup.16 cm.sup.−3 or less, the concentration of O impurities is 1×10.sup.16 cm.sup.−3 or less, the concentration of Ca impurities is 1×10.sup.16 cm.sup.−3 or less, and the sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities. Such a semiconductor device can be fabricated by using a halogen-free vapor phase epitaxy (HF-VPE) device.

Provided is a semiconductor device according to an embodiment including an i-type or first-conductivity-type first diamond semiconductor layer having a first side surface, a second-conductivity-type second diamond semiconductor layer provided on the first diamond semiconductor layer and having a second side surface, a third diamond semiconductor layer being in contact with the first side surface and the second side surface, the third diamond semiconductor containing nitrogen, a first electrode electrically connected to the first diamond semiconductor layer, and a second electrode electrically connected to the second diamond semiconductor layer.

An object is to provide a technique that ensures to reduce a parasitic resistance of a semiconductor device while enhancing a breakdown voltage property of a semiconductor device. A portion of a second semiconductor layer exposed from a first semiconductor layer corresponds to a concave portion of a laminated structure and the first semiconductor layer or an adjacent portion of the first semiconductor layer and a second semiconductor layer corresponds to a convex portion of the laminated structure. A first guard ring of a second conductivity type is arranged on side walls of the convex portion, and in the concave portion, a guard ring of the second conductivity type is not arranged, or a second guard ring of the second conductivity type having a thickness thinner than that of the first guard ring is arranged.

An object is to provide a technique that ensures to reduce a parasitic resistance of a semiconductor device while enhancing a breakdown voltage property of a semiconductor device. A portion of a second semiconductor layer exposed from a first semiconductor layer corresponds to a concave portion of a laminated structure and the first semiconductor layer or an adjacent portion of the first semiconductor layer and a second semiconductor layer corresponds to a convex portion of the laminated structure. A first guard ring of a second conductivity type is arranged on side walls of the convex portion, and in the concave portion, a guard ring of the second conductivity type is not arranged, or a second guard ring of the second conductivity type having a thickness thinner than that of the first guard ring is arranged.

Silicon carbide junction barrier Schottky diode disclosed. Silicon carbide junction barrier Schottky diode includes a first conductivity-type substrate, a first conductivity-type epitaxial layer, being formed by epitaxial growth of silicon carbide doped with a first conductivity-type impurity on the first conductivity-type substrate, a charge injection region, being formed on the first conductivity-type epitaxial layer and doped at a concentration of the first conductivity-type impurity higher than that of the first conductivity-type epitaxial layer, a second conductivity-type junction region, being formed on the first conductivity-type epitaxial layer so as to contact the charge injection region, a Schottky metal layer, being formed on the charge injection region and the second conductivity-type junction region, an anode electrode, being formed on the Schottky metal layer, and a cathode electrode, being formed under the first conductivity-type substrate.

Silicon carbide junction barrier Schottky diode disclosed. Silicon carbide junction barrier Schottky diode includes a first conductivity-type substrate, a first conductivity-type epitaxial layer, being formed by epitaxial growth of silicon carbide doped with a first conductivity-type impurity on the first conductivity-type substrate, a charge injection region, being formed on the first conductivity-type epitaxial layer and doped at a concentration of the first conductivity-type impurity higher than that of the first conductivity-type epitaxial layer, a second conductivity-type junction region, being formed on the first conductivity-type epitaxial layer so as to contact the charge injection region, a Schottky metal layer, being formed on the charge injection region and the second conductivity-type junction region, an anode electrode, being formed on the Schottky metal layer, and a cathode electrode, being formed under the first conductivity-type substrate.

Apparatuses and methods are provided for manufacturing diamond electronic devices. The method includes at least one of the following acts: positioning a substrate in a plasma enhanced chemical vapor deposition (PECVD) reactor; controlling temperature of the substrate by manipulating microwave power, chamber pressure, and gas flow rates of the PECVD reactor; and growing phosphorus doped diamond layer on the substrate using a pulsed deposition comprising a growth cycle and a cooling cycle.

Apparatuses and methods are provided for manufacturing diamond electronic devices. The method includes at least one of the following acts: positioning a substrate in a plasma enhanced chemical vapor deposition (PECVD) reactor; controlling temperature of the substrate by manipulating microwave power, chamber pressure, and gas flow rates of the PECVD reactor; and growing phosphorus doped diamond layer on the substrate using a pulsed deposition comprising a growth cycle and a cooling cycle.

An ESD protection device includes a semiconductor body having an upper surface, a plurality of p-type wells that each extend from the upper surface into the semiconductor body, a plurality of n-type wells that each extend from the upper surface into the semiconductor body, first isolation regions comprising an electrical insulator that laterally surrounds the p-type wells and extends from the upper surface into the semiconductor body at least as deep as the p-type wells, and second isolation regions comprising an electrical insulator that laterally surrounds the n-type wells and extends from the upper surface into the semiconductor body at least as deep as the n-type wells, wherein the p-type wells and the n-type wells alternate with one another a first direction, and wherein an isolating area of the first isolation regions is greater than an isolating area of the second isolation regions.