Patent classifications
H01L31/03682
CRYSTALLINE SILICON INGOT INCLUDING NUCLEATION PROMOTION LAYER AND METHOD OF FABRICATING THE SAME
A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.
System and method for improving color appearance of solar roofs
One embodiment can provide a photovoltaic roof tile. The photovoltaic roof tile can include a transparent front cover, a transparent back cover, and a plurality of polycrystalline-Si-based photovoltaic structures positioned between the front cover and the back cover. A respective polycrystalline-Si-based photovoltaic structure has a front surface facing the front cover and a back surface facing the back cover. The photovoltaic roof tile can further include a paint layer positioned on a back surface of the back cover facing away from the front cover. A color of the paint layer substantially matches a color of the front surface of the respective polycrystalline-Si-based photovoltaic structure.
LOCAL METALLIZATION FOR SEMICONDUCTOR SUBSTRATES USING A LASER BEAM
Local metallization of semiconductor substrates using a laser beam, and the resulting structures, e.g., micro-electronic devices, semiconductor substrates and/or solar cells, are described. For example, a solar cell includes a substrate and a plurality of semiconductor regions disposed in or above the substrate. A plurality of conductive contact structures is electrically connected to the plurality of semiconductor regions. Each conductive contact structure includes a locally deposited metal portion disposed in contact with a corresponding a semiconductor region.
Solar cell
A solar cell includes a silicon substrate, an emitter area formed on a front surface of the silicon substrate, a tunneling oxide layer formed on a back surface of the silicon substrate, a back surface field area formed on the tunneling oxide layer and formed of a polycrystalline silicon layer, a back passivation film formed on the back surface field area and having an opening, and a back electrode connected to the back surface field area via the opening.
Nanostructured units formed inside a silicon material and the manufacturing process to perform them therein
The invention bears on elementary nanoscale units nanostructured-formed inside a silicon material and the manufacturing process to implement them. Each elementary nanoscale unit is created by means of a limited displacement of two Si atoms outside a crystal elementary unit. A localized nanoscale transformation of the crystalline matter gets an unusual functionality by focusing in it a specific physical effect as is a highly useful additional set of electron energy levels that is optimized for the solar spectrum conversion to electricity. An adjusted energy set allows a low-energy secondary electron generation in a semiconductor, preferentially silicon, material for use especially in very-high efficiency all-silicon light-to-electricity converters. The manufacturing process to create such transformations in a semiconductor material bases on a local energy deposition like ion implantation or electron (γ,X) beam irradiation and suitable thermal treatment and is industrially easily available.
Solar cells with improved lifetime, passivation and/or efficiency
A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
Screen printing electrical contacts to nanowire areas
A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
Method and optoelectronic structure providing polysilicon photonic devices with different optical properties in different regions
Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.
Solar cell
A solar cell is disclosed. The solar cell includes a first conductive region positioned at a front surface of a semiconductor substrate and containing impurities of a first conductivity type or a second conductivity type, a second conductive region positioned at a back surface of the semiconductor substrate and containing impurities of a conductivity type opposite a conductivity type of impurities of the first conductive region, a first electrode positioned on the front surface of the semiconductor substrate and connected to the first conductive region, and a second electrode positioned on the back surface of the semiconductor substrate and connected to the second conductive region. Each of the first and second electrodes includes metal particles and a glass frit.
TRENCH PROCESS AND STRUCTURE FOR BACKSIDE CONTACT SOLAR CELLS WITH POLYSILICON DOPED REGIONS
A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.