A detection device comprising: an insulating substrate; a plurality of gate lines that are provided on the insulating substrate, and extend in a first direction; a plurality of signal lines that are provided on the insulating substrate, and extend in a second direction intersecting the first direction; a switching element coupled to each of the gate lines and each of the signal lines; a first photoelectric conversion element that comprises a first semiconductor layer containing amorphous silicon, and is coupled to the switching element; and a second photoelectric conversion element that comprises a second semiconductor layer containing polysilicon, and is coupled to the switching element.

The disclosure relates to the technical field of solar cells, and provides a solar cell and a doped region structure thereof, a cell assembly, and a photovoltaic system. The doped region structure includes a first doped layer, a passivation layer, and a second doped layer that are disposed on a silicon substrate in sequence. The passivation layer is a porous structure having the first doped layer and/or the second doped layer inlaid in a hole region. The first doped layer and the second doped layer have a same doping polarity. By means of the doped region structure of the solar cell provided in the disclosure, the difficulty in production and the limitation on conversion efficiency as a result of precise requirements for the accuracy of a thickness of a conventional tunneling layer are resolved.

A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.

A solar cell module according to the present disclosure includes a photoelectric converter, a collector electrode electrically connected to the photoelectric converter, and a wiring material (3) electrically connected to the collector electrode, wherein the collector electrode includes: a first electrode film (9A) formed on a photoelectric converter side; and a second electrode film (9B) formed on at least a wiring material side of the first electrode film (9A) so that part of a surface of the first electrode film (9A) on the wiring material side is exposed, and wherein the collector electrode and the wiring material (3) are electrically connected to each other with solder (11) connected to the part of the surface of the first electrode film (9A) exposed from the second electrode film (9B) and to a surface of the second electrode film (9B).

A method and apparatus for reducing as-deposited and metastable defects relative to amorphous silicon (a-Si) thin films, its alloys and devices fabricated therefrom that include heating an earth shield positioned around a cathode in a parallel plate plasma chemical vapor deposition chamber to control a temperature of a showerhead in the deposition chamber in the range of 350° C. to 600° C. An anode in the deposition chamber is cooled to maintain a temperature in the range of 50° C. to 450° C. at the substrate that is positioned at the anode. In the apparatus, a heater is embedded within the earth shield and a cooling system is embedded within the anode.

The production process according to the invention consists of a nanometric scale transformation of the crystalline silicon in a hybrid arrangement buried within the crystal lattice of a silicon wafer, to improve the efficiency of the conversion of light into electricity, by means of hot electrons. All the parameters, procedures and steps involved in manufacturing giant photoconversion cells have been tested and validated separately, by producing twenty series of test devices. An example of the technology consists of manufacturing a conventional crystalline silicon photovoltaic cell with a single collection junction and completing the device thus obtained by an amorphizing ion implantation followed by a post-implantation thermal treatment. The modulation of the crystal, specific to the giant photoconversion, is then carried out on a nanometric scale in a controlled manner to obtain SEGTONs and SEG-MATTER which are active both optically and electronically, together with the primary conversion of the host converter.

The present disclosure relates to a solid state imaging element and an electronic device that make it possible to improve sensitivity to light on a long wavelength side. A solid state imaging element according to a first aspect of the present disclosure has a solid state imaging element in which a large number of pixels are arranged vertically and horizontally, the solid state imaging element includes a periodic concave-convex pattern on a light receiving surface and an opposite surface to the light receiving surface of a light absorbing layer as a light detecting element. The present disclosure can be applied to, for example, a CMOS and the like installed in a sensor that needs a high sensitivity to light belonging to a region on the long wavelength side, such as light in the infrared region.

Provided are a solar cell having a good conversion efficiency in which damage to a p-n junction structure is prevented when an antireflection film is removed, and a method of manufacturing such a solar cell.

Systems and methods for detection of incident light are described. An optical imaging sensor is positioned at least partially within an active display area of a display and is configured to detect and characterize one or more properties of light incident to the active display area of the display.

A device includes a first stage having a first optical switch, a first transistor connected to the first optical switch, and a second transistor connected to the first optical switch and the first transistor. The device also includes a second stage having a second optical switch, a third transistor connected to the second transistor and the second optical switch, and a fourth transistor connected to the second transistor, the second optical switch, and the third transistor.