H01L31/0682

METHOD FOR IMPROVING OHMIC CONTACT BEHAVIOUR BETWEEN A CONTACT GRID AND AN EMITTER LAYER OF A SILICON SOLAR CELL
20210288208 · 2021-09-16 ·

The invention relates to a method for improving ohmic contact behaviour between a contact grid and an emitter layer of a silicon solar cell. The object of the invention is to propose a method for improving contact behaviour between the contact grid and the emitter layer of silicon solar cells, which method is used after the contacting of these solar cells and thus reduces the scrap quota of solar cells with faulty contacting. In order to achieve this object, a method is proposed which has the following method steps. First a silicon solar cell (1) is provided with the emitter layer, the contact grid (5) and a back contact (3). Then the contact grid (5) is electrically contacted by a contact pin matrix (8) or contact plate connected to one terminal of a current source and the back contact (3) is electrically connected by a contact device connected to the other terminal of the current source. Using the current source, at least one current pulse is induced along the forward direction of the silicon solar cell (1), the current pulse having a pulse duration of 1 ms to 100 ms and a current strength which is equivalent to 10 to 30 times the short-circuit current strength of the silicon solar cell (1). Two alternative methods are also proposed.

Solar cell module

A solar cell module includes a plurality of first conductive lines connected to a first electrode of a first solar cell and extended in a first direction; a plurality of second conductive lines connected to a second electrode of a second solar cell adjacent with the first solar cell and extended in the first direction; and an intercell connector spaced apart from the first solar cell and the second solar cell and extended in a second direction crossing the first direction, the intercell connector including a first connection portion connected with the plurality of first conductive lines and a second connection portion connected with the plurality of second conductive lines, wherein a separation distance between the first solar cell and the first connection portion is closer than a separation distance between the second solar cell and a part of the intercell connector positioned on the same line as the first connection portion.

Interdigitated back contact metal-insulator-semiconductor solar cell with printed oxide tunnel junctions

Screen-printable metallization pastes for forming thin oxide tunnel junctions on the back-side surface of solar cells are disclosed. Interdigitated metal contacts can be deposited on the oxide tunnel junctions to provide all-back metal contact to a solar cell.

TRANSCEIVER ASSEMBLY FOR FREE SPACE POWER TRANSFER AND DATA COMMUNICATION SYSTEM
20210296942 · 2021-09-23 ·

A transceiver assembly for a wireless power transfer system includes a transceiver system comprising a photodiode assembly, a voltage converter and a light emitting diode and a photodiode. The photodiode assembly may be configured to receive a high-power laser beam from a transmitter and to convert the high-power laser beam to electrical energy. The voltage converter may be configured to adjust an input impedance based on a voltage measure of the photodiode assembly so as to maximize power transfer from the photodiode assembly to an energy storage device electrically coupled to the voltage converter. The light emitting diode and the photodiode may be configured to enable free space optical communication with the transmitter. The light emitting diode may emit signals indicating a presence and a location of the transceiver to the transmitter at least when the energy storage device requires a charge.

SOLAR CELL HAVING AN EMITTER REGION WITH WIDE BANDGAP SEMICONDUCTOR MATERIAL

Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.

Single-step metal bond and contact formation for solar cells

A method for fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a first metal layer on the dielectric region. The method can also include forming a second metal layer on the first metal layer and locally heating a particular region of the second metal layer, where heating includes forming a metal bond between the first and second metal layer and forming a contact between the first metal layer and the solar cell structure. The method can include forming an adhesive layer on the first metal layer and forming a second metal layer on the adhesive layer, where the adhesive layer mechanically couples the second metal layer to the first metal layer and allows for an electrical connection between the second metal layer to the first metal layer.

Blister-free polycrystalline silicon for solar cells

Described herein are methods of fabricating solar cells. In an example, a method of fabricating a solar cell includes forming an amorphous dielectric layer on the back surface of a substrate opposite a light-receiving surface of the substrate. The method also includes forming a microcrystalline silicon layer on the amorphous dielectric layer by plasma enhanced chemical vapor deposition (PECVD). The method also includes forming an amorphous silicon layer on the microcrystalline silicon layer by PECVD. The method also includes annealing the microcrystalline silicon layer and the amorphous silicon layer to form a homogeneous polycrystalline silicon layer from the microcrystalline silicon layer and the amorphous silicon layer. The method also includes forming an emitter region from the homogeneous polycrystalline silicon layer.

HIGH EFFICIENCY SOLAR CELL AND METHOD FOR MANUFACTURING HIGH EFFICIENCY SOLAR CELL

A solar cell including a semiconductor substrate having a first conductivity type an emitter region, having a second conductivity type opposite to the first conductivity type, on a first main surface of the semiconductor substrate an emitter electrode which is in contact with the emitter region a base region having the first conductivity type a base electrode which is in contact with the base region and an insulator film for preventing an electrical short-circuit between the emitter region and the base region, wherein the insulator film is made of a polyimide, and the insulator film has a C.sub.6H.sub.11O.sub.2 detection count number of 100 or less when the insulator film is irradiated with Bi.sub.5.sup.++ ions with an acceleration voltage of 30 kV and an ion current of 0.2 pA by a TOF-SIMS method. The solar cell can have excellent weather resistance and high photoelectric conversion characteristics.

Roll-to-roll metallization of solar cells

Disclosed herein are approaches to fabricating solar cells, solar cell strings and solar modules using roll-to-roll foil-based metallization approaches. Methods disclosed herein can comprise the steps of providing at least one solar cell wafer on a first roll unit and conveying a metal foil to the first roll unit. The metal foil can be coupled to the solar cell wafer on the first roll unit to produce a unified pairing of the metal foil and the solar cell wafer. We disclose solar energy collection devices and manufacturing methods thereof enabling reduction of manufacturing costs due to simplification of the manufacturing process by a high throughput foil metallization process.

Solar battery device and method for manufacturing solar battery device
11081617 · 2021-08-03 · ·

A solar battery device includes a semiconductor substrate and a covering part. The semiconductor substrate has a first semiconductor region and a second semiconductor region. The first semiconductor region is a first-conductivity-type semiconductor region located on a first surface of the semiconductor substrate. The second semiconductor region is a second-conductivity-type semiconductor region different from the first-conductivity-type and located on a second surface opposite from the first surface. The covering part is located on the first surface of the semiconductor substrate. The covering part has a laminated portion in which a plurality of layers including a passivation layer and an antireflection layer are present in a laminated state. In the laminated portion, the passivation layer includes a region in which a thickness decreases from an outer peripheral portion toward a central part of the first surface.