Patent classifications
H01L31/0682
BACK CONTACT STRUCTURE AND SELECTIVE CONTACT REGION BURIED SOLAR CELL COMPRISING THE SAME
A back contact structure of a solar cell, includes: a silicon substrate, the silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately in the plurality of recesses, where each first conductive region includes a first dielectric layer and a first doped region which are disposed successively in the plurality of recesses, and each second conductive region includes a second doped region; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions.
BACK CONTACT STRUCTURE AND SELECTIVE CONTACT REGION BURIED SOLAR CELL COMPRISING THE SAME
A back contact structure includes: a silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately on the back surface of the silicon substrate; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions. One of the plurality of first conductive regions and the plurality of second conductive regions is disposed inside the plurality of recesses, respectively, and the other one is disposed outside the plurality of recesses; each first conductive region includes a first dielectric layer and a first doped region which are disposed successively, and each second conductive region includes a second doped region.
Solar cell
Disclosed is a solar cell. The solar cell includes a semiconductor substrate, conductivity-type regions located in or on the semiconductor substrate, electrodes conductively connected to the conductivity-type regions, and insulating films located on at least one of opposite surfaces of the semiconductor substrate, and including a first film and a second film located on the first film, the second film has a higher carbon content than that of the first film, a refractive index of the second film is equal to or less than a refractive index of the first film, and an extinction coefficient of the second film is equal to or greater than an extinction coefficient of the first film.
Solar cells having junctions retracted from cleaved edges
Methods of fabricating solar cells having junctions retracted from cleaved edges, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface, a back surface, and sidewalls. An emitter region is in the substrate at the light-receiving surface of the substrate. The emitter region has sidewalls laterally retracted from the sidewalls of the substrate. A passivation layer is on the sidewalls of the emitter region.
SOLAR CELL AND PHOTOVOLTAIC MODULE
A solar cell including: a substrate having front and back surfaces, the back surface includes first, second and gap regions, the first and second regions are staggered and spaced from each other in a first direction, and each gap region is provided between one first region and one second region adjacent thereto by recessing toward interior of the substrate; a first conductive layer formed over the first region; a second conductive layer formed over the second region, the second conductive layer has a conductivity type opposite to the first conductive layer; a first electrode forming electrical contact with the first conductive layer; a second electrode forming electrical contact with the second conductive layer; and a boundary region between the gap region and the first and/or second conductive layer adjacent thereto, and a line-pattern concave and convex texture structure is formed on the back surface corresponding to the boundary region.
WIRE-BASED METALLIZATION FOR SOLAR CELLS
Approaches for fabricating wire-based metallization for solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a back surface and an opposing light-receiving surface. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the back surface of the substrate. A conductive contact structure is disposed on the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal wires. Each metal wire of the plurality of metal wires is parallel along a first direction to form a one-dimensional layout of a metallization layer for the solar cell.
Solar cell and photovoltaic module
A solar cell and a photovoltaic module including the solar cell. The solar cell includes: a semiconductor substrate including a first surface and a second surface opposite to each other; a first dielectric layer located on the first surface; a first N+ doped layer located on a surface of the first dielectric layer; a first passivation layer located on a surface of the first N+ doped layer; a first electrode located on a surface of the first passivation layer; a second dielectric layer located on the second surface; a first P+ doped layer located on a surface of the second dielectric layer; a second passivation layer located on a surface of the first P+ doped layer; and a second electrode located on a surface of the second passivation layer.
Solar cell emitter region fabrication with differentiated P-type and N-type region architectures
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
Electrode structure of back contact cell, back contact cell, back contact cell module, and back contact cell system
The disclosure provides an electrode structure of a back contact cell, a back contact cell, a back contact cell module, and a back contact cell system. The electrode structure includes: first fingers, configured to collect a first polarity region; second fingers, configured to collect a second polarity region; a first busbar, disposed on a side of the back contact cell close to a first edge and connected to the first fingers; first pad points; and first connection electrodes, respectively connected to the first busbar and the first pad points. A distance between each of the first pad points and the first edge is greater than a distance between the first busbar and the first edge. The electrode structure can improve the reliability, reduce the costs, increase the product yield, and ensure excellent photoelectric conversion efficiency.
SOLAR CELLS HAVING JUNCTIONS RETRACTED FROM CLEAVED EDGES
Methods of fabricating solar cells having junctions retracted from cleaved edges, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface, a back surface, and sidewalls. An emitter region is in the substrate at the light-receiving surface of the substrate. The emitter region has sidewalls laterally retracted from the sidewalls of the substrate. A passivation layer is on the sidewalls of the emitter region.