A multijunction solar cell with a graded interlayer disposed between two adjacent solar subcells, the graded interlayer being compositionally graded to lattice match a first solar subcell on one side, and an adjacent second solar subcell on the other side, the graded interlayer being composed of at least four step layers, a particular step layer having a lattice constant in the range of 0.2 to 1.2% greater than the lattice constant of the adjacent layer on which it is grown, and the subsequent steps layers disposed directly on the particular step layer having a lattice constant in the range of 0.1 to 0.6% greater than the particular layer on which it is grown, and wherein the thickness of the particular step layer is at least twice the thickness of each of the other subsequent step layers.

A photovoltaic (PV) apparatus includes a substrate having a first substrate surface and a second substrate surface. A cavity fabricated in the substrate extends from the first substrate surface toward the second substrate surface. The cavity defines a first end to receive incident light, a second end opposite the first end, and a side surface, which extends from the first end to the second end to concentrate the incident light, received by the first end, toward the second end. The PV apparatus also includes a photovoltaic (PV) cell, in optical communication with the second end of the at least one cavity, to convert the incident light into electricity.

A photovoltaic (PV) apparatus includes a substrate having a first substrate surface and a second substrate surface. A cavity fabricated in the substrate extends from the first substrate surface toward the second substrate surface. The cavity defines a first end to receive incident light, a second end opposite the first end, and a side surface, which extends from the first end to the second end to concentrate the incident light, received by the first end, toward the second end. The PV apparatus also includes a photovoltaic (PV) cell, in optical communication with the second end of the at least one cavity, to convert the incident light into electricity.

Manufacture of multi-junction solar cells, and devices thereof, are disclosed. The architectures are also adapted to provide for a more uniform and consistent fabrication of the solar cell structures, leading to improved yields, greater efficiency, and lower costs. Certain solar cells may be from a different manufacturing process and further include one or more compositional gradients of one or more semiconductor elements in one or more semiconductor layers, resulting in a more optimal solar cell device.

A method of forming a multijunction solar cell that includes an InGaAs buffer layer and an InGaAlAs grading interlayer disposed below, and adjacent to, the InGaAs buffer layer. The grading interlayer achieves a transition in lattice constant from one solar subcell to another adjacent solar subcell.

An apparatus and method for producing a perpetual energy harvester which harvests ambient near ultraviolet to infrared radiation and provides continual power regardless of the environment. The device seeks to harvest the largely overlooked blackbody radiation through use of a semiconductor thermal harvester, providing a continuous source of power. Additionally, increased power output is provided through a solar harvester. The solar and thermal harvesters are physically connected but electrically isolated.

An apparatus and method for producing a perpetual energy harvester which harvests ambient near ultraviolet to infrared radiation and provides continual power regardless of the environment. The device seeks to harvest the largely overlooked blackbody radiation through use of a semiconductor thermal harvester, providing a continuous source of power. Additionally, increased power output is provided through a solar harvester. The solar and thermal harvesters are physically connected but electrically isolated.

An epitaxially grown III-V layer is separated from the growth substrate. The III-V layer can be an inverted lattice matched (ILM) or inverted metamorphic (IMM) solar cell, or a light emitting diode (LED). A sacrificial epitaxial layer is embedded between the GaAs wafer and the III-V layer. The sacrificial layer is damaged by absorbing IR laser radiation. A laser is chosen with the right wavelength, pulse width and power. The radiation is not absorbed by either the GaAs wafer or the III-V layer. No expensive ion implantation or lateral chemical etching of a sacrificial layer is needed. The III-V layer is detached from the growth wafer by propagating a crack through the damaged layer. The active layer is transferred wafer-scale to inexpensive, flexible, organic substrate. The process allows re-using of the wafer to grow new III-V layers, resulting in savings in raw materials and grinding and etching costs.

An epitaxially grown III-V layer is separated from the growth substrate. The III-V layer can be an inverted lattice matched (ILM) or inverted metamorphic (IMM) solar cell, or a light emitting diode (LED). A sacrificial epitaxial layer is embedded between the GaAs wafer and the III-V layer. The sacrificial layer is damaged by absorbing IR laser radiation. A laser is chosen with the right wavelength, pulse width and power. The radiation is not absorbed by either the GaAs wafer or the III-V layer. No expensive ion implantation or lateral chemical etching of a sacrificial layer is needed. The III-V layer is detached from the growth wafer by propagating a crack through the damaged layer. The active layer is transferred wafer-scale to inexpensive, flexible, organic substrate. The process allows re-using of the wafer to grow new III-V layers, resulting in savings in raw materials and grinding and etching costs.

A flip-chip multi junction solar cell chip integrated with a bypass diode includes from up to bottom: a glass cover; a transparent bonding layer; a front electrode; an n/p photoelectric conversion layer; a p/n tunnel junction; a structure layer of the n/p bypass diode; a first backside electrode; a second backside electrode. The solar cell chip also includes at least a through hole extending through the n/p photoelectric conversion layer, the p/n tunnel junction and the structure layer of the n/p bypass diode. An ultra-thin substrate-less cell can therefore be provided without occupying effective light receiving areas, greatly improving cell heat dissipation. With a light weight, the chip can also have advantages in space power application.