H01L31/0735

DEVICE AND METHOD OF MONOLITHIC INTEGRATION OF MICROINVERTERS ON SOLAR CELLS
20170366135 · 2017-12-21 ·

A method of fabricating a photovoltaic cell having a microinverter is provided. The method may include fabricating a monolithic microinverter layer through epitaxy and operably connecting the at least one microinverter layer to at least one photovoltaic cell formed on a photovoltaic layer. A photovoltaic device is also provided. The device may have a photovoltaic layer comprising at least one photovoltaic cell and a microinverter layer comprising at least one microinverter, wherein the microinverter layer was fabricated through epitaxy, the at least one microinverter is configured to be operably connected to at least one photovoltaic cell.

DILUTE NITRIDE BISMIDE SEMICONDUCTOR ALLOYS
20170365732 · 2017-12-21 ·

High efficiency dilute nitride bismide alloys and multijunction photovoltaic cells incorporating the high efficiency dilute nitride bismide alloys are disclosed. Bismuth-containing dilute nitride subcells exhibit a high efficiency across a broad range of irradiance energies, a high short circuit current density, and a high open circuit voltage.

DILUTE NITRIDE BISMIDE SEMICONDUCTOR ALLOYS
20170365732 · 2017-12-21 ·

High efficiency dilute nitride bismide alloys and multijunction photovoltaic cells incorporating the high efficiency dilute nitride bismide alloys are disclosed. Bismuth-containing dilute nitride subcells exhibit a high efficiency across a broad range of irradiance energies, a high short circuit current density, and a high open circuit voltage.

SOLAR CELL MODULE
20170358693 · 2017-12-14 ·

A solar cell module includes a plurality of compound semiconductor solar cells each including a compound semiconductor substrate, a first electrode part on a front surface of the compound semiconductor substrate, an insulating substrate positioned at a back surface of the compound semiconductor substrate, a second electrode part positioned between the back surface of the compound semiconductor substrate and a front surface of the insulating substrate, and an insulating adhesive attaching the insulating substrate to the second electrode part; a conductive connection member electrically connecting two adjacent compound semiconductor solar cells to each other; a conductive adhesive attaching the conductive connection member to a corresponding electrode part of the compound semiconductor solar cell; a front substrate positioned on the compound semiconductor solar cells; and a back substrate positioned below the compound semiconductor solar cells.

INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELLS FOR SPACE APPLICATIONS
20230197878 · 2023-06-22 ·

A multijunction solar cell with a graded interlayer disposed between two adjacent solar subcells, the graded interlayer being compositionally graded to lattice match a first solar subcell on one side, and an adjacent second solar subcell on the other side, the graded interlayer being composed of at least four step layers, a particular step layer having a lattice constant in the range of 0.2 to 1.2% greater than the lattice constant of the adjacent layer on which it is grown, and the subsequent steps layers disposed directly on the particular step layer having a lattice constant in the range of 0.1 to 0.6% greater than the particular layer on which it is grown, and wherein the thickness of the particular step layer is at least twice the thickness of each of the other subsequent step layers.

AlGaAs/GaAs solar cell with back-surface alternating contacts (GaAs BAC solar cell)

The disclosure provides a solar cell design featuring p-or-n type GaAs with alternating p-n junction regions on the back-surface of the cell, opposite incident solar irradiance. Various layers of p-or-n type GaAs are interfaced together to collect charge carriers, and a thin layer of AlGaAs is applied to the front and back surfaces to prevent recombination of charge carriers. In some embodiments, the layered an doped structure generally provides an AlGaAs window layer of about 20 nm doped to about 4×(10.sup.18) cm.sup.−3, a GaAs absorption layer of about 2000 nm doped to about 4×(10.sup.17) cm.sup.−3, a GaAs emitter layer of about 150 nm and doped to 1×(10.sup.18) cm.sup.−3, an AlGaAs heterojunction layer of about 40 nm doped to about 3×(10.sup.18) cm.sup.−3, and a GaAs emitter-contact layer of about 20 nm doped to about 1×(10.sup.19) cm.sup.−3. Additionally, AlGaAs BSF layer and GaAs BSF-contact layers each have a depth of about 20 nm and are doped to about 4×(10.sup.18) cm.sup.−3 and 1×(10.sup.19) cm.sup.−3 respectively. The emitter layer, heterojunction layer, and emitter-contact layer are doped to a conductivity type opposite the absorption layer.

AlGaAs/GaAs solar cell with back-surface alternating contacts (GaAs BAC solar cell)

The disclosure provides a solar cell design featuring p-or-n type GaAs with alternating p-n junction regions on the back-surface of the cell, opposite incident solar irradiance. Various layers of p-or-n type GaAs are interfaced together to collect charge carriers, and a thin layer of AlGaAs is applied to the front and back surfaces to prevent recombination of charge carriers. In some embodiments, the layered an doped structure generally provides an AlGaAs window layer of about 20 nm doped to about 4×(10.sup.18) cm.sup.−3, a GaAs absorption layer of about 2000 nm doped to about 4×(10.sup.17) cm.sup.−3, a GaAs emitter layer of about 150 nm and doped to 1×(10.sup.18) cm.sup.−3, an AlGaAs heterojunction layer of about 40 nm doped to about 3×(10.sup.18) cm.sup.−3, and a GaAs emitter-contact layer of about 20 nm doped to about 1×(10.sup.19) cm.sup.−3. Additionally, AlGaAs BSF layer and GaAs BSF-contact layers each have a depth of about 20 nm and are doped to about 4×(10.sup.18) cm.sup.−3 and 1×(10.sup.19) cm.sup.−3 respectively. The emitter layer, heterojunction layer, and emitter-contact layer are doped to a conductivity type opposite the absorption layer.

A METHOD OF EPITAXIAL GROWTH OF A MATERIAL INTERFACE BETWEEN GROUP III-V MATERIALS AND SILICON WAFERS PROVIDING COUNTERBALANCING OF RESIDUAL STRAINS
20170352536 · 2017-12-07 ·

The present invention relates to a method of manufacturing semiconductor materials comprising interface layers of group III-V materials in combination with Si substrates. Especially the present invention is related to a method of manufacturing semiconductor materials comprising GaAs in combination with Si(111) substrates, wherein residual strain due to different thermal expansion coefficient of respective materials is counteracted by introducing added layer(s) compensating the residual strain.

Manufacturing Semiconductor-Based Multi-Junction Photovoltaic Devices
20170345962 · 2017-11-30 ·

Manufacture of multi-junction solar cells, and devices thereof, are disclosed. The architectures are also adapted to provide for a more uniform and consistent fabrication of the solar cell structures, leading to improved yields, greater efficiency, and lower costs. Certain solar cells may be from a different manufacturing process and further include one or more compositional gradients of one or more semiconductor elements in one or more semiconductor layers, resulting in a more optimal solar cell device.

Manufacturing Semiconductor-Based Multi-Junction Photovoltaic Devices
20170345962 · 2017-11-30 ·

Manufacture of multi-junction solar cells, and devices thereof, are disclosed. The architectures are also adapted to provide for a more uniform and consistent fabrication of the solar cell structures, leading to improved yields, greater efficiency, and lower costs. Certain solar cells may be from a different manufacturing process and further include one or more compositional gradients of one or more semiconductor elements in one or more semiconductor layers, resulting in a more optimal solar cell device.