A method of manufacturing a light emitting diode is provided. The method includes forming a semiconductor layer on a substrate, forming a mask layer including a plurality of grooves on the semiconductor layer, forming a plurality of nanostructures in the plurality of grooves, respectively, forming an etched region by etching an outer region of the semiconductor layer and an inner region of the semiconductor layer different from the outer region, forming a first electrode on the etched region of the semiconductor layer, forming an insulation layer on the first electrode, and forming a second electrode on the insulation layer and the plurality of nanostructures.

A micro-light emitting diode (LED) includes an epitaxial structure having a mesa and a top portion on the mesa. The epitaxial structure further includes quantum wells within the mesa configured to emit light, claddings surrounding the quantum wells, and a light emitting surface on a side opposite the mesa and top portion. A reflective contact is on the top portion of the epitaxial structure. Light emitted from the quantum wells are transmitted through the mesa and the top portion in first directions, and reflected by the reflective contact back through the top portion and the mesa in second directions toward the light emitting surface. The top portion allows the quantum wells to be positioned at a parabola focal point of the mesa without limiting cladding thickness.

Disclosed is a method for fabricating an LED module. The method includes: constructing a chip-on-carrier including a chip retainer having a horizontal bonding plane and a plurality of LED chips in which electrode pads are bonded to the bonding plane of the chip retainer; and transferring the plurality of LED chips in a predetermined arrangement from the chip retainer to a substrate by transfer printing. The transfer printing includes: primarily section-wise exposing a transfer tape to reduce the adhesive strength of the transfer tape such that bonding areas are formed at predetermined intervals on the transfer tape; and pressurizing the transfer tape against the LED chips on the chip retainer to attach the LED chips to the corresponding bonding areas of the transfer tape and detaching the electrode pads of the LED chips from the chip retainer to pick up the chips.

The object of the present invention is to provide a Group III nitride semiconductor light emitting diode having improved light extraction efficiency. A Group III nitride semiconductor light emitting diode according to the present disclosure includes an RAMO.sub.4 layer including a single crystal represented by the general formula RAMO.sub.4 (wherein R represents one or more trivalent elements selected from the group consisting of Sc, In, Y and lanthanoid elements, A represents one or more trivalent elements selected from the group consisting of Fe (III), Ga and Al, and M represents one or more divalent elements selected from the group consisting of Mg, Mn, Fe (II), Co, Cu, Zn and Cd); and a layered product stacked on the RAMO.sub.4 layer. The layered product includes at least a light emitting layer including a Group III nitride semiconductor. A degree of flatness of a surface, of the RAMO.sub.4 layer, opposite to the layered product is lower than a degree of flatness of a surface, of the RAMO.sub.4 layer, adjacent to the layered product.

A method for preparing a crystalline semiconductor layer in order for the layer to be provided with a specific lattice parameter involves a relaxation procedure that is applied for a first time to a first start donor substrate in order to obtain a second donor substrate. Using the second donor substrate as the start donor substrate, the relaxation procedure is repeated for a number of times that is sufficient for the lattice parameter of the relaxed layer to be provided with the specific lattice parameter. A set of substrates may be obtained by the method.

A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.

A light-emitting device can include a conductive support structure comprising a metal; a GaN-based semiconductor structure disposed on the conductive support structure, the GaN-based semiconductor structure including a p-type GaN-based layer, a GaN-based active layer and an n-type GaN-based layer, in which the GaN-based semiconductor structure has a first surface, a side surface and a second surface, in which the first surface, relative to the second surface, is proximate to the conductive support structure, in which the second surface is opposite to the first surface, in which the conductive support structure is thicker than the p-type GaN-based semiconductor layer, and the conductive support structure is thicker than the n-type GaN-based semiconductor layer; a p-type electrode disposed on the conductive support structure; an n-type electrode disposed on the second surface of the GaN-based semiconductor structure; and a passivation layer disposed on the side surface and the second surface of the GaN-based semiconductor structure.

A vertical topology light emitting device can include a conductive support structure; an adhesion layer disposed on the conductive support structure; a p-type contact disposed on the adhesion layer; a GaN-based semiconductor structure disposed on the p-type contact, in which the GaN-based semiconductor structure includes an n-type GaN-based layer, a p-type GaN-based layer, and an active layer between the n-type GaN-based layer and the p-type GaN-based layer, in which the n-type GaN-based layer has an etched flat surface, and the GaN-based semiconductor structure includes a bottom surface proximate to the conductive support structure, a top surface opposite to the bottom surface, and a side surface between the top surface and the bottom surface; an interface layer on the GaN-based semiconductor structure; and a contact pad disposed on the interface layer, in which the interface layer includes a portion which directly contacts the etched flat surface of the n-type GaN-based layer, and a first thickness of the conductive support structure is 0.5 times less than a width of the top surface of the GaN-based semiconductor structure.

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.