A method for manufacturing an image display device includes: preparing a substrate, the substrate comprising a semiconductor layer, the semiconductor layer comprising a light emitting layer, the semiconductor layer being formed on a first substrate; bonding the semiconductor layer to a second substrate, the second substrate comprising a circuit that comprises a circuit element; forming a light emitting element by etching the semiconductor layer; forming an insulating film covering the light emitting element; forming a via reaching the circuit through the insulating film; and electrically connecting the light emitting element and the circuit element through the via, the via connecting the light emitting element and the circuit element provided in different layers.

A nitride semiconductor light-emitting element includes an n-type cladding layer including n-type AlGaN, and an active layer that includes AlGaN and is located on the n-type cladding layer. Si concentration distribution in a direction of stacking the n-type cladding layer and the active layer has a local peak in the active layer.

The present disclosure describes epitaxial oxide high electron mobility transistors (HEMTs). In some embodiments, a HEMT comprises: a substrate; a template layer on the substrate; a first epitaxial semiconductor layer on the template layer; and a second epitaxial semiconductor layer on the first epitaxial semiconductor layer. The template layer can comprise crystalline metallic Al(111). The first epitaxial semiconductor layer can comprise (Al.sub.xGa.sub.1-x).sub.yO.sub.z, wherein 0≤x≤1, 1≤y≤3, and 2≤z≤4, wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a Pna21 space group, and wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a first conductivity type formed via polarization. The second epitaxial semiconductor layer can comprise a second oxide material.

A production method for an image display device, the method including: preparing at least one structure including a semiconductor layer formed on a first substrate; forming a first metal layer on a second substrate; bonding the semiconductor layer to the first metal layer; removing the first substrate; forming a light-emitting element by etching the semiconductor layer, the light-emitting element including a bottom surface on the first metal layer, and a light-emitting surface located opposite to the bottom surface; forming a first insulating film that covers the second substrate and the light-emitting element; forming a circuit element on the first insulating film; forming a second insulating film that covers the circuit element and the first insulating film; exposing a surface that includes the light-emitting surface by removing portions of the first insulating film and the second insulating film; and forming a wiring layer on the second insulating film.

A method of manufacturing a light emitting diode (LED) device includes forming an LED structure by depositing a plurality of semiconductor layers on a transparent substrate. Trenched metal is placed in the plurality of semiconductor layers, with the trenched metal contacting the transparent substrate. The LED structure is attached to a CMOS structure with electrical interconnects that define a cavity therebetween. Laser light is used to provide laser lift-off of the transparent substrate from the plurality of semiconductor layers.

Exemplary semiconductor structures may include a silicon-containing substrate. The structures may include a layer of a metal nitride overlying the silicon-containing substrate. The layer of the metal nitride may include a plurality of features. The structures may include a gallium nitride structure overlying the layer of the metal nitride.

The present disclosure provides a light-emitting structure and a manufacturing method thereof. The light-emitting structure includes: a GaN-based LED structure and a nitrogen-containing passivation layer located on a sidewall of the GaN-based LED structure; wherein the GaN-based LED structure includes: a first semiconductor layer, a second semiconductor layer, and a light-emitting layer located between the first semiconductor layer and the second semiconductor layer, conductivity types of the first semiconductor layer and the second semiconductor layer are opposite.

Exemplary semiconductor structures may include a silicon-containing substrate. The structures may include a layer of a metal nitride overlying the silicon-containing substrate. The structures may include a gallium nitride structure overlying the layer of the metal nitride. The structures may include an oxygen-containing layer disposed between the layer of the metal nitride and the gallium nitride structure.

The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates. In some embodiments, the present invention provides materials, structures, devices, and methods for acoustic wave devices and technology, including epitaxial and non-epitaxial piezoelectric materials and structures useful for acoustic wave devices. In some embodiments, the present invention provides metal-base transistor devices, structures, materials and methods of forming metal-base transistor material structures for use in semiconductor devices.

The present disclosure provides an LED structure and a preparation method thereof. The LED structure includes: a first conductivity semiconductor layer; a stress releasing layer disposed on the first conductivity semiconductor layer, and a material of the stress releasing layer is a III-V group semiconductor material; a V-shaped layer disposed on the stress releasing layer and having V-shaped grooves, where the V-shaped grooves are formed under a control of the stress releasing layer; a multi-quantum well layer, configured to conformally cover a surface of the V-shaped layer away from the stress releasing layer; a second conductivity semiconductor layer disposed on a side of the multi-quantum well layer away from the first conductivity semiconductor layer, where a conductivity type of the second conductivity semiconductor layer is different from that of the first conductivity semiconductor layer.