A group III-nitride laminated substrate includes a sapphire substrate, a first layer that is formed on the sapphire substrate and is made of aluminum nitride, a second layer that is formed on the first layer and serves as an n-type layer made of gallium nitride and doped with an n-type dopant, a third layer that is formed on the second layer and serves as a light-emitting layer made of a group III-nitride, and a fourth layer that is formed on the third layer and serves as a p-type layer made of a group III-nitride and doped with a p-type dopant. The second layer has a thickness of 7 μm or less. A half-value width of (0002) diffraction determined through X-ray rocking curve analysis is 100 seconds or less, and a half-value width of (10-12) diffraction determined through X-ray rocking curve analysis is 200 seconds or less.

A display device includes a first electrode and a second electrode that are disposed on a substrate, a light emitting element disposed on the first electrode and the second electrode, a first contact electrode electrically connecting the first electrode and the light emitting element to each other, and a second contact electrode electrically connecting the second electrode and the light emitting element to each other. The light emitting element includes a first semiconductor layer including a semiconductor of a first type, a second semiconductor layer including a semiconductor of a second type, and an active layer disposed between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer includes a doped semiconductor layer including a porous structure.

A metal organic chemical vapor deposition system includes a reaction chamber, a first heater arranged on a first side of the reaction chamber, and a second heater arranged on a second side of the reaction chamber. A controller is configured to selectively control an amount of heat applied by the second heater to the reaction chamber depending on a type of vapor deposition being performed in the reaction chamber.

Pixelated-LED chips and related methods are disclosed. A pixelated-LED chip includes an active layer with independently electrically accessible active layer portions arranged on or over a light-transmissive substrate. The active layer portions are configured to illuminate different light-transmissive substrate portions to form pixels. Various enhancements may beneficially provide increased contrast (i.e., reduced cross-talk between pixels) and/or promote inter-pixel illumination homogeneity, without unduly restricting light utilization efficiency. In some aspects, an underfill material with improved surface coverage is provided between adjacent pixels of a pixelated-LED chip. The underfill material may be arranged to cover all lateral surfaces between the adjacent pixels. In some aspects, discontinuous substrate portions are formed before application of underfill materials. In some aspects, a wetting layer is provided to improve wicking or flow of underfill materials during various fabrication steps. Other technical benefits may additionally or alternatively be achieved.

An electrode structure includes: an indium tin oxide (ITO) electrode that includes ITO; an Al electrode that includes Al and covers the ITO electrode; and a barrier electrode that includes at least one of TiN and Cr and is interposed in a region between the ITO electrode and the Al electrode.

High quality ammonothermal group III metal nitride crystals having a pattern of locally-approximately-linear arrays of threading dislocations, methods of manufacturing high quality ammonothermal group III metal nitride crystals, and methods of using such crystals are disclosed. The crystals are useful for seed bulk crystal growth and as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and for photoelectrochemical water splitting for hydrogen generation devices.

Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.

A nanowire LED, a display module including the nanowire LED, and a method for manufacturing the display module are provided. The method for manufacturing a display module includes forming a template layer including a magnetic layer on a silicon substrate, growing a plurality of nanowire LEDs on the template layer, separating the plurality of nanowire LEDs from the template layer by ultrasonic waves, forming a plurality of unit cells in a state in which the plurality of nanowire LEDs are aligned to have a specific directivity, forming a plurality of unit pixels by transferring the plurality of unit cells onto a unit substrate, arranging the plurality of unit pixels on a thin film transistor (TFT) substrate through a fluidic self-assembly, and bonding the plurality of unit pixels to be connected to an electrode of the TFT substrate.

A method for growing an electron-blocking layer, an epitaxial layer, and an LED chip are provided in the present disclosure. The epitaxial layer includes an N-type semiconductor layer, an active layer, a P-type semiconductor layer, and an electron-blocking layer. The electron-blocking layer is disposed between the active layer and the P-type semiconductor layer, and the N-type semiconductor layer is disposed on one side of the active layer away from the electron-blocking layer. The electron-blocking layer includes a proximal aluminum barrier layer close to the active layer, a distal aluminum barrier layer close to the P-type semiconductor layer, and an indium well layer disposed between the proximal aluminum barrier layer and the distal aluminum barrier layer. The content of aluminum component in the distal aluminum barrier layer is lower than the content of aluminum component in the proximal aluminum barrier layer.

A method for light-emitting element transferring includes: providing multiple light-emitting elements, each light-emitting element includes a first light-emitting unit, a substrate, and a second light-emitting unit sequentially stacked, the first light-emitting unit includes a first epitaxial structure and a first electrode group stacked on a side of the substrate, the second light-emitting unit includes a second epitaxial structure and a second electrode group stacked on another side of the substrate, and the first light-emitting unit and the second light-emitting unit have different light-emitting colors; providing a display backplane, multiple grooves are defined on the display backplane, a first pad group and a second pad group are provided on side walls of each groove; and embedding the multiple light-emitting elements into the multiple grooves in one-to-one correspondence, where the first electrode group is bonded with the first pad group, and the second electrode group is bonded with the second pad group.