Patent classifications
H01L33/007
III-nitride semiconductor light-emitting device comprising barrier layers and well layers and method of producing the same
Provided is a III-nitride semiconductor light-emitting device having excellent light output power as compared with conventional devices and a method of producing the same. The III-nitride semiconductor light-emitting device has an emission wavelength of 200 nm to 350 nm and includes an n-type semiconductor layer; a light emitting layer in which N barrier layers 40b and N well layers 40w (where N is an integer) are alternately stacked in this order; an AlN guide layer; an electron blocking layer; and a p-type semiconductor layer in this order. The electron block layer is made of p-type Al.sub.zGa.sub.1-zN (0.50?z?0.80), and the barrier layers are made of n-type Al.sub.bGa.sub.1-bN (z+0.01?b?0.95).
GROWTH SUBSTRATE OF A DIODE ARRAY, INCLUDING MESAS HAVING DIFFERENT POROSIFICATION LEVELS
A growth substrate adapted for making by epitaxy an array of InGaN based diodes, including mesas M.sub.(i), made of GaN based crystalline materials, each including N doped layers, with N?2, separated in pairs by an insulation intermediate layer made of a non-porous material, and each having a free upper face adapted for making a diode of the array by epitaxy; the mesas being configured according to at least three different categories including: a so-called M.sub.(N) mesas category where the N doped layers are porous; a so-called M.sub.(0) mesas category where none of the doped layers (13, 15) is porous; and a so-called M.sub.(n) mesas category where n doped layers are porous, with 1?n<N.
LIGHT EMITTING DEVICE
A light emitting device including a substrate having a light emitting area and a light shielding area, a light emitting structure disposed on the substrate and comprising at least one active layer, and a light shielding layer disposed on the substrate and defining the light shielding area, in which the light emitting area overlaps with the light emitting structure, the substrate has a rough surface overlapping at least a portion of the light emitting area, and a portion of the rough surface is covered with the light shielding layer, and light emitted from the at least one active layer is configured to be transmitted through the substrate.
METHOD OF CONTROLLING BOW IN A SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR DEVICE
A method of controlling bow in a layered semiconductor structure comprises the steps of: providing a layered semiconductor structure comprising a first layer of III-nitride semiconductor material on a substrate, the layered semiconductor structure having a first bow, and forming a porous region of III-nitride semiconductor material over the first layer of III-nitride semiconductor material, in which the layered semiconductor structure comprising the porous region has a second bow different from the first bow. A semiconductor structure having controllable bow comprises a first layer of III-nitride semiconductor material on a substrate, and a porous region of III-nitride semiconductor material over the first layer of III-nitride semiconductor material. The layered semiconductor structure comprising the porous region has a second bow, and the second bow is tunable by tuning a porosity and/or thickness of the porous region.
SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS THEREOF
The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a silicon substrate having several through-silicon-vias therein; a first semiconductor layer located in each through-silicon-via and on the silicon substrate, an active layer located on the first semiconductor layer, and a second semiconductor layer located on the active layer, where a conductivity type of the second semiconductor layer is opposite to that of the first semiconductor layer, a material of the first semiconductor layer a group III nitride, a material of the active layer a group III nitride, and a material of the second semiconductor layer include a group III nitride.
Substrate for epitaxial growth, method for manufacturing the same, semiconductor device including the same and method for manufacturing semiconductor device
A substrate for epitaxial growth includes a central region that has a center of the substrate and that serves as a non-modified region, and a peripheral region that surrounds the central region in a manner to be spaced apart from the center of the substrate by a distance and that serves as a modified region having a plurality of modified points. A method for manufacturing a substrate for epitaxial growth includes providing a substrate and forming a plurality of modified points in an interior of the substrate in position corresponding to the modified region. A semiconductor device including the substrate and a method for manufacturing the semiconductor device are also disclosed.
Optical device and manufacturing method thereof
An optical device includes a multilayered GaAs structure including a plurality of sublayers and an optical structure layer on the multilayered GaAs structure, the optical structure layer including a Group III-V compound semiconductor material. The optical structure layer may be, for example, a light-emitting layer having a multi-quantum well structure.
MICRO-LED MODULE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a micro-LED module is disclosed. The method includes: preparing a micro-LED including a plurality of electrode pads and a plurality of LED cells; preparing a submount substrate including a plurality of electrodes corresponding to the plurality of electrode pads; and flip-bonding the micro-LED to the submount substrate through a plurality of solders located between the plurality of electrode pads and the plurality of electrodes. The flip-bonding includes heating the plurality of solders by a laser.
Via for Semiconductor Device Connection and Methods of Forming the Same
A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.
MONOLITHICALLY INTEGRATED HIGH VOLTAGE PHOTOVOLTAICS AND LIGHT EMITTING DIODE WITH TEXTURED SURFACE
A method of forming an electrical device that includes epitaxially growing a first conductivity type semiconductor material of a type III-V semiconductor on a semiconductor substrate. The first conductivity type semiconductor material continuously extending along an entirety of the semiconductor substrate in a plurality of triangular shaped islands; and conformally forming a layer of type III-V semiconductor material having a second conductivity type on the plurality of triangular shaped islands to provide a textured surface of a photovoltaic device. A light emitting diode is formed on the textured surface of the photovoltaic device.