A multilayer structure including a hexagonal epitaxial layer, such as GaN or other group III-nitride (III-N) semiconductors, a <111> oriented textured layer, and a non-single crystal substrate, and methods for making the same. The textured layer has a crystalline alignment preferably formed by the ion-beam assisted deposition (IBAD) texturing process and can be biaxially aligned. The in-plane crystalline texture of the textured layer is sufficiently low to allow growth of high quality hexagonal material, but can still be significantly greater than the required in-plane crystalline texture of the hexagonal material. The IBAD process enables low-cost, large-area, flexible metal foil substrates to be used as potential alternatives to single-crystal sapphire and silicon for manufacture of electronic devices, enabling scaled-up roll-to-roll, sheet-to-sheet, or similar fabrication processes to be used. The user is able to choose a substrate for its mechanical and thermal properties, such as how well its coefficient of thermal expansion matches that of the hexagonal epitaxial layer, while choosing a textured layer that more closely lattice matches that layer. Electronic devices such as LEDs can be manufactured from such structures. Because the substrate can act as both a reflector and a heat sink, transfer to other substrates, and use of external reflectors and heat sinks, is not required, greatly reducing costs. Large area devices such as light emitting strips or sheets may be fabricated using this technology.

A method for manufacturing a light emitting device, includes providing a light emitting element including an electrode-formed surface, a substrate surface opposite to the electrode-formed surface, and a light emitting surface connecting the electrode-formed surface and the substrate surface. A bottom mold including a mounting surface having a protrusion and mold recesses provided on both sides of the protrusion to define the protrusion is provided. The light emitting element is mounted on the protrusion such that the light emitting surface faces the protrusion. A covering material is provided on the mounting surface of the bottom mold to fill the mold recesses and to cover an entirety of the light emitting element except for the light emitting surface. The bottom mold with the protrusion is removed to provide a recess in the covering material. A light-transmissive material is provided in the recess of the covering material.

An LED package for connection to a heat sink, the LED package comprising an LED structure having a first surface for emitting light and an opposite second surface, the LED structure comprising a light producing layer and a reflective layer, wherein the reflective layer is provided between the light producing layer and the second surface, whereby light is reflected by the reflective layer to the first surface, the first surface further comprising first and second electrical contacts. A frame overlaps the periphery of the first surface of the LED structure and has an aperture for emitting light from the first surface, the frame comprising first and second vias for connection to an external electrical circuit, the first and second vias are soldered to the first and second electrical contacts of the LED structure respectively.

Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

A LED including an epitaxial stacked layer, a first electrode and a second electrode is provided. The epitaxial stacked layer includes a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer. The epitaxial stacked layer has a first mesa portion and a second mesa portion to form a first type conductive region and a second type conductive region respectively. The first electrode is disposed on the first mesa portion. The second electrode is disposed on the second mesa portion. The second electrode contacts the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer located at the second mesa portion. Moreover, a manufacturing method of the LED is also provided.

There is provided a manufacturing method of a III-V compound crystal including a seed-crystal-formed substrate provision step of providing a seed-crystal-formed substrate in which a III-V compound seed crystal has been formed on a substrate, a seed crystal partial separation step of separating part of a portion in contact with the substrate in the III-V compound seed crystal from the substrate, and a crystal growth step of generating and growing the III-V compound crystal by reacting a group III element and a group V element with use of the III-V compound seed crystal as a nucleus after the seed crystal partial separation step.

A visible light communication LED having a spiral inductance coil and a circular core is provided, comprising a sapphire substrate provided with a positive electrode welding spot and a negative electrode welding spot, and a plurality of LED cores deposited on the sapphire substrate. The negative electrode of a former core is connected with the positive electrode of a latter core, and the positive electrode of the first core and the negative electrode of the last core are respectively connected to the positive electrode welding spot and the negative electrode welding spot on the substrate. According to the present invention, each of the LED cores is surrounded by a spiral inductance coil, and a pin of one end of the spiral inductance coil is connected via a connecting wire with the negative electrode of an adjacent LED core, while the other end is directly connected with the positive electrode of the LED core that is surrounded by the spiral inductance coil.

A semiconductor light emitting device and a method of manufacturing a semiconductor light emitting device, the device including a first conductive semiconductor layer including a plurality of V-shaped recesses; an active layer on the first conductive semiconductor layer along a shape of the plurality of V-shaped recesses; a second conductive semiconductor layer on the active layer; a reflection assisting layer on the second conductive semiconductor layer; and a reflection layer on the reflection assisting layer, wherein a thickness of the second conductive semiconductor layer is 45 nm to 100 nm.

Oxygen controlled PVD AlN buffers for GaN-based optoelectronic and electronic devices is described. Methods of forming a PVD AlN buffer for GaN-based optoelectronic and electronic devices in an oxygen controlled manner are also described. In an example, a method of forming an aluminum nitride (AlN) buffer layer for GaN-based optoelectronic or electronic devices involves reactive sputtering an AlN layer above a substrate, the reactive sputtering involving reacting an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-containing gas or a plasma based on a nitrogen-containing gas. The method further involves incorporating oxygen into the AlN layer.

A light-emitting device including a substrate having a top surface, a side surface and a roughed surface between the top surface and the side surface, wherein the top surface includes a first portion and a second portion; a first semiconductor stack including a first upper surface and a first side wall, wherein the first semiconductor stack is on the second portion and exposes the first portion; a second semiconductor stack including a second side wall, wherein the second semiconductor stack is on the first upper surface and exposes an exposing portion of the first upper surface; wherein the first side wall and the first portion of the top surface form an acute angle between thereof, and the second side wall and the exposing portion of the first upper surface form an obtuse angle between thereof; and wherein the roughed surface is connected to the top surface.