H01L33/007

Optoelectronic device and method for manufacturing same

An optoelectronic device comprises a substrate; pads on a surface of the substrate; semiconductor elements, each element resting on a pad; a portion covering at least the lateral sides of each pad, the portion preventing the growth of the semiconductor elements on the lateral sides; and a dielectric region extending in the substrate from the surface and connecting, for each pair of pads, one of the pads in the pair to the other pad in the pair. A method of manufacturing an optoelectronic device is also disclosed.

Layered substrate with a miscut angle comprising a silicon single crystal substrate and a group-III nitride single crystal layer

A step-flow growth of a group-III nitride single crystal on a silicon single crystal substrate is promoted. A layer of oxide oriented to a <111> axis of silicon single crystal is formed on a surface of a silicon single crystal substrate, and group-III nitride single crystal is crystallized on a surface of the layer of oxide. Thereupon, a <0001> axis of the group-III nitride single crystal undergoing crystal growth is oriented to a c-axis of the oxide. When the silicon single crystal substrate is provided with a miscut angle, step-flow growth of the group-III nitride single crystal occurs. By deoxidizing a silicon oxide layer formed at an interface of the silicon single crystal and the oxide, orientation of the oxide is improved.

GROUP III NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
20220310874 · 2022-09-29 ·

An n-side composition gradient layer includes an intermediate layer and composition continuous gradient layers. The intermediate layer is the group III nitride semiconductor layer containing In. The composition continuous gradient layers are group III nitride semiconductor layers in which an In composition changes in a direction perpendicular to a boundary surface between a well layer and a barrier layer. A thickness of the intermediate layer is thinner than a thickness of the well layer. An In composition of the intermediate layer is equal to or less than an In composition of the well layer. In the composition continuous gradient layers, the In composition continuously changes in a streamline manner toward the intermediate layer.

Semiconductor component with a multi-layered nucleation body

There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.

NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING THE SAME

Provided is a nitride semiconductor light emitting element which has good luminous efficiency by suppressing deep-level emission and increasing the monochromaticity. A nitride semiconductor light emitting element according to the present invention comprises an active layer between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer. The n-type nitride semiconductor layer contains Al.sub.X1In.sub.X2Ga.sub.X3N (wherein 0<X1≦1, 0≦X2<1, 0≦X3<1, X1+X2+X3=1), and both the concentration of C contained therein and the concentration of O contained therein are less than or equal to 1×10.sup.17/cm.sup.3.

COMPOSITE SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THEREOF
20170221705 · 2017-08-03 ·

According to one embodiment, a semiconductor device is provided with a first single crystal layer, a polycrystalline layer provided on an entire surface of the first single crystal layer, and a second single crystal layer bonded to the polycrystalline layer. The coefficient of thermal expansion of the polycrystalline layer is greater than the coefficient of thermal expansion of the second single crystal layer, and is smaller than the coefficient of thermal expansion of a compound semiconductor layer which can be provided on the second single crystal layer using an intervening a buffer layer.

Luminescent ceramic for a light emitting device

A semiconductor light emitting device comprising a light emitting layer disposed between an n-type region and a p-type region is combined with a ceramic layer which is disposed in a path of light emitted by the light emitting layer. The ceramic layer is composed of or includes a wavelength converting material such as a phosphor. Luminescent ceramic layers according to embodiments of the invention may be more robust and less sensitive to temperature than prior art phosphor layers. In addition, luminescent ceramics may exhibit less scattering and may therefore increase the conversion efficiency over prior art phosphor layers.

Nanowire sized opto-electronic structure and method for modifying selected portions of same
09722135 · 2017-08-01 · ·

A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.

Separating a wafer of light emitting devices

Embodiments of the invention are directed to a method of separating a wafer of light emitting devices. The method includes scribing a first groove on a dicing street on the wafer and checking the alignment of the wafer using a location of the first groove relative to a feature on the wafer. After checking the alignment, a second groove is scribed on the dicing street.

METHOD FOR PRODUCING GROUP III NITRIDE CRYSTAL, AND RAMO4 SUBSTRATE

A method for producing a Group III nitride crystal, includes: preparing an RAMO.sub.4 substrate containing a single crystal represented by the general formula RAMO.sub.4 (wherein R represents one or a plurality of trivalent elements selected from a group consisting of Sc, In, Y, and a lanthanoid element, A represents one or a plurality of trivalent elements selected from a group consisting of Fe(III), Ga, and Al, and M represents one or a plurality of divalent elements selected from a group consisting of Mg, Mn, Fe(II), Co, Cu, Zn, and Cd) and having a notch on a side portion thereof; growing a Group III nitride crystal on the RAMO.sub.4 substrate; and cleaving the RAMO.sub.4 substrate from the notch.