A method of manufacturing a light source device includes the steps of providing a mask layer to a substrate, providing the mask layer with a plurality of first openings and at least one second opening, and growing columnar parts having a light emitting section from the plurality of first openings, and growing a structure from the second opening.

A semiconductor light emitting device includes a light extraction layer having a light extraction surface. Multiple cone-shaped parts formed in an array are provided on the light extraction surface. The cone-shaped part has a first portion having a first angle of inclination of a side surface and a second portion having a second angle of inclination of a side surface smaller than the first angle. The second portion is closer to an apex of the cone-shaped part than the first portion and has a larger height than the first portion.

A method for preparing a crystalline semiconductor layer in order for the layer to be provided with a specific lattice parameter involves a relaxation procedure that is applied for a first time to a first start donor substrate in order to obtain a second donor substrate. Using the second donor substrate as the start donor substrate, the relaxation procedure is repeated for a number of times that is sufficient for the lattice parameter of the relaxed layer to be provided with the specific lattice parameter. A set of substrates may be obtained by the method.

A light emitting module including a mounting substrate, light emitting chips mounted on the mounting substrate, and pads, in which the light emitting chips include a first substrate, a first light emitting unit on a first surface of the first substrate, a second substrate spaced apart from the first substrate, and a second light emitting unit on a second surface of the second substrate, the first substrate includes a first side surface including a first modified surface, and the second substrate includes a second side surface facing the first side surface and including a second modified surface, the first modified surface includes first modified regions extended in a thickness direction and first ruptured regions disposed therebetween, the second modified surface includes second modified regions extended in the thickness direction and second ruptured regions disposed therebetween, and the first ruptured regions have the same width as the second ruptured regions.

Resonant optical cavity light emitting devices are disclosed, where the device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength and is positioned at a separation distance from the reflector. The reflector may be a distributed Bragg reflector. The device has an optical cavity comprising the first spacer region, the second spacer region and the light emitting region, where the optical cavity has a total thickness less than or equal to K.Math.λ/n. K is a constant ranging from 0.25 to 10, λ is the target wavelength, and n is an effective refractive index of the optical cavity at the target wavelength.

Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.

A method for manufacturing a display panel (10), the display panel (10), and a display apparatus (20) are provided. The method includes the following. A first substrate (110) and a second substrate (120) are provided, where the first substrate (110) includes a growth substrate (111), an epitaxial structure (112), and a first metal layer (113) that are sequentially stacked, and the second substrate (120) includes a circuit substrate (121) and a second metal layer (122) stacked on the circuit substrate (121). An activation treatment is performed on the first metal layer (113) and the second metal layer (122). The first metal layer (113) and the second metal layer (122) are bonded after the activation treatment, to cause the growth substrate (111), the epitaxial structure (112), the first metal layer (113), the second metal layer (122), and the circuit substrate (121) sequentially stacked. The growth substrate (111) is lift off.

A process for fabricating a heterostructure made of semiconductor materials having a crystalline structure of wurtzite type, includes the following steps: structuring a surface of a zinc oxide monocrystalline substrate into mesas; depositing by epitaxy at least one layer of semiconductor materials having a crystalline structure of wurtzite type, forming the heterostructure, on top of the structured surface. Heterostructure obtained by such a process. A process for fabricating at least one electronic or optoelectronic device from such a heterostructure is also provided.

To improve a wall plug efficiency in a nitride semiconductor light-emitting element for extracting ultraviolet light emitted from an active layer toward an n-type nitride semiconductor layer side to outside of the element. In the n-type AlGaN-based semiconductor layer 21 constituting the nitride semiconductor light-emitting element 1, a plurality of thin film-like Ga-rich layers that is a part of the n-type layer 21 having a locally high Ga composition ratio exists spaced apart from each other in a vertical direction that is orthogonal to the upper surface of the n-type layer 21, an extending direction of at least a part of the plurality of Ga-rich layers on a first plane parallel to the vertical direction is inclined with respect to an intersection line between the upper surface of the n-type layer and the first plane, the plurality of Ga-rich layers exists in stripes on the second plane parallel to the upper surface of the n-type layer 21 in an upper layer region having a thickness of 100 nm or less at lower side from the upper surface of the n-type layer 21, AlN molar fractions of the Ga-rich layers 21b are greater than AlN molar fraction of a well layer 22b in an active layer 22 constituting the light-emitting element 1.

A method of separating a wafer including rows of light emitting devices is described. Dicing streets are provided on the wafer such that a respective one of the dicing streets is provided between each of the rows of light emitting devices on the wafer. The wafer is broken along a first one of the dicing streets to separate a first portion of the wafer from a remaining portion of the wafer. The first portion of the wafer includes more than one of the rows of light emitting devices. The first portion of the wafer is broken along a second one of the dicing streets to separate a second portion of the wafer from the first portion of the wafer.