A luminescent nanostructure, a production method for making the luminescent nanostructure, and an electronic device including the luminescent nanostructure. The luminescent nanostructure includes a semiconductor nanocrystal including a Group 13 metal nitride. The luminescent nanostructure has an aspect ratio of greater than or equal to about 1, and an organic compound having an M-O moiety, wherein M is Ti, Al, Zr, Sn, or Si that is bound to at least a portion of the surface of the luminescent nanostructure.

The inventive concept relates to a light emitting diode integrated with a transition metal dichalcogenide-based transistor and capable of simultaneously fabricating the transistor to have a monolithic integration structure. The transition metal dichalcogenide is formed on the light emitting diode device, thereby providing the light emitting diode integrated with the transistor without affecting the characteristics of the light emitting diode device.

Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the plurality of mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. Each of the mesas is spaced so that there is a pixel pitch in a range of from 10 μm to 100 μm and dark space gap between adjacent edges of p-contact layer. The dark space gap may be less than 20% of the pixel pitch. The dark space gap may be in a range of from 4 μm to 10 μm.

Aspects of the subject disclosure may include, for example, bonding III-Nitride epitaxial layer(s) to a carrier wafer, wherein the III-Nitride epitaxial layer(s) are grown on a non-native substrate, after the bonding, removing at least a portion of the non-native substrate from the III-Nitride epitaxial layer(s), processing the III-Nitride epitaxial layer(s) to derive an array of III-Nitride islands, establishing a metal layer over the array of III-Nitride islands, resulting in an array of metal-coated III-Nitride islands, arranging the carrier wafer relative to a host wafer to position the array of metal-coated III-Nitride islands on a surface of the host wafer, causing the array of metal-coated III-Nitride islands and the surface of the host wafer to eutectically bond, and removing the carrier wafer to yield an integrated arrangement of III-Nitride islands on the host wafer. Additional embodiments are disclosed.

Exemplary processing methods of forming a semiconductor structure may include forming subpixels on a substrate. Each of the subpixels may include a gallium-and-nitrogen-containing layer formed on an exposed portion of a nucleation layer on the substrate. The subpixels may further include a porosified region formed on or in the gallium-and-nitrogen-containing region, and an active region formed on the porosified region. The active region may include an indium-gallium-and-nitrogen-containing material. The processing methods may further include forming a first reflection layer around one of the subpixels, wherein the first reflection layer includes a first metal layer. The methods may additionally include forming a second reflection layer around another of the subpixels, wherein the second reflection layer includes a second metal that is different than the first metal.

A flip-chip light-emitting diode structure capable of emitting trichromatic spectrum and a manufacturing method thereof, including a blue-green light layer with a light-stimulated green light-emitting structure and an electron-stimulated blue light-emitting structure, a bonding layer and a red light layer with a light-stimulated red light-emitting structure. The manufacturing method uses a sapphire bonding layer as the bonding layer, and forming the blue-green light layer and the red light layer by growing epitaxy on two sides of the sapphire bonding layer; or, after growing the blue-green light layer and the red light layer by epitaxy respectively, uses the bonding layer to connect. Accordingly, an externally applied voltage stimulates the electron-stimulated blue light-emitting structure to generate a blue light, the blue light stimulates the light-stimulated green light-emitting structure to generate a green light, and the blue and green lights stimulate the light-stimulated red light-emitting structure to generate a red light.

Exemplary processing methods of forming a semiconductor structure may include forming a nucleation layer on a semiconductor substrate. The methods may further include forming first, second, and third, gallium-and-nitrogen-containing regions on the nucleation layer. The first gallium-and-nitrogen-containing region may be porosified, without porosifying the second and third gallium-and-nitrogen containing regions. The methods may still further include forming a first active region on the porosified first gallium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region. The methods may yet also include forming a third active region on the unporosified third gallium- and-nitrogen-containing region.

A micro light emitting element includes: a nitride semiconductor layer in which an N-type layer, a light emitting layer, and a P-type layer are stacked. Viewing in a direction perpendicular to a surface of the nitride semiconductor layer, multiple V pits are arranged at positions corresponding to vertexes of a polygon in a one-to-one relation in a region of the nitride semiconductor layer.

Exemplary methods of forming a semiconductor structure may include forming a nucleation layer on a semiconductor substrate. The exemplary methods may further include forming at least one gallium nitride (GaN)-containing region on the nucleation layer, and forming an indium-gallium-nitride (InGaN)-containing layer on the GaN-containing region. A porosified region may be formed on a portion of at least one of the GaN-containing region and the InGaN-containing layer, and an active region may be formed on the porosified region. In embodiments, the porosified region may be characterized by a void fraction of greater than or about 20 vol. %. In further embodiments, the active region may include a greater mole percentage (mol. %) indium than the porosified region or the GaN-containing region. In still further embodiments, the active region may characterized by a peak light emission at a wavelength of greater than or about 620 nm.

A semiconductor light emitting element includes: a first light emitting part comprising: a first n-side nitride semiconductor layer; a first active layer located on the first n-side nitride semiconductor layer; and a first p-side nitride semiconductor layer located on the first active layer; and a second n-side nitride semiconductor layer. A bonding face of the first light emitting part and a bonding face of the second n-side nitride semiconductor layer are directly bonded. At least one void is present between the bonding face of the first light emitting part and the bonding face of the second n-side nitride semiconductor layer.