H01L33/007

IMAGE DISPLAY DEVICE MANUFACTURING METHOD AND IMAGE DISPLAY DEVICE
20220262782 · 2022-08-18 · ·

A method of manufacturing an image display device includes: providing a semiconductor growth substrate comprising a semiconductor layer; providing a circuit substrate comprising: a circuit element, a first wiring layer, and a first insulating film; forming a first metal layer that is located on the first insulating film and is electrically connected to the first wiring layer; bonding the semiconductor growth substrate to the circuit substrate and electrically connecting the first metal layer to the semiconductor layer; etching the semiconductor layer to form a light-emitting element; etching the first metal layer to form a plug electrically connected to the light-emitting element; forming a second insulating film covering the plug, the light-emitting element, and the first insulating film; removing a portion of the second insulating film to expose a light-emitting surface of the light-emitting element; and forming a second wiring layer electrically connected to the light-emitting surface.

Method To Remove An Isolation Layer On The Corner Between The Semiconductor Light Emitting Device To The Growth Substrate

A method for fabricating semiconductor light emitting devices (LEDs) includes forming a plurality of light emitting diode (LED) structures having sidewall P-N junctions on a growth substrate, and forming an isolation layer on the light emitting diode (LED) structures having corners at intersections of the epitaxial structures with the growth substrate. The method also includes forming an etchable covering channel layer on the isolation layer, forming a patterning protection layer on the covering channel layer, forming etching channels in the covering channel layer using a first etching process, and removing the corners of the isolation layer by etching the isolation layer using a second etching process. Following the second etching process the isolation layer covers the sidewall P-N junctions. The method can also include bonding the growth substrate to a carrier and separating the growth substrate from the light emitting diode (LED) structures using a laser lift off (LLO) process.

LIGHT EMITTING DIODE HAVING SIDE REFLECTION LAYER
20220085251 · 2022-03-17 ·

A light emitting diode including a side reflection layer. The light emitting diode includes: a semiconductor stack and a light exit surface having a roughened surface through which light generated from an active layer is emitted; side surfaces defining the light exit surface; and a side reflection layer covering at least part of the side surfaces. The light exit surface is disposed over a first conductivity type semiconductor layer opposite to the ohmic reflection layer, all layers from the active layer to the light exit surface are formed of gallium nitride-based semiconductors, and a distance from the active layer to the light exit surface is 50 μm or more.

Zincblende structure group III-nitride

A method is disclosed of manufacturing a semiconductor structure comprising an (001) oriented zincblende structure group III-nitride layer, such as GaN. The layer is formed on a 3C—SiC layer on a silicon substrate. A nucleation layer is formed, recrystallized and then the zincblende structure group III-nitride layer is formed by MOVPE at temperature T3 in the range 750-1000° C., to a thickness of at least 0.5 μm. There is also disclosed a corresponding semiconductor structure comprising a zincblende structure group III-nitride layer which, when characterized by XRD, shows that the substantial majority, or all, of the layer is formed of zincblende structure group III-nitride in preference to wurtzite structure group III-nitride.

DISLOCATION FREE SEMICONDUCTOR NANOSTRUCTURES GROWN BY PULSE LASER DEPOSITION WITH NO SEEDING OR CATALYST
20220108887 · 2022-04-07 ·

There is a method for forming a semiconductor nanostructure on a substrate. The method includes placing a substrate and a semiconductor material in a pulsed laser deposition chamber; selecting parameters including a fluence of a laser beam, a pressure P inside the chamber, a temperature T of the substrate, a distance d between the semiconductor material and the substrate, and a gas molecule diameter a.sub.0 of a gas to be placed inside the chamber so that conditions for a Stranski-Krastanov nucleation are created; and applying the laser beam with the selected fluence to the semiconductor material to form a plume of the semiconductor material. The selected parameters determine the formation, from the plume, of (1) a nanolayer that covers the substrate, (2) a polycrystalline wetting layer over the nanolayer, and (3) a single-crystal nanofeature over the polycrystalline wetting layer, and the single-crystal nanofeature is grown free of any catalyst or seeding layer.

DEVICE SOURCE WAFERS WITH PATTERNED DISSOCIATION INTERFACES

A transfer-printable (e.g., micro-transfer-printable) device source wafer comprises a growth substrate comprising a growth material, a plurality of device structures comprising one or more device materials different from the growth material, the device structures disposed on and laterally spaced apart over the growth substrate, each device structure comprising a device, and a patterned dissociation interface disposed between each device structure of the plurality of device structures and the growth substrate. The growth material is more transparent to a desired frequency of electromagnetic radiation than at least one of the one or more device materials. The patterned dissociation interface has one or more areas of relatively greater adhesion each defining an anchor between the growth substrate and a device structure of the plurality of device structures and one or more dissociated areas of relatively lesser adhesion between the growth substrate and the device structure of the plurality of device structures.

Monolithically integrated InGaN/GaN quantum nanowire devices

InGaN/GaN quantum layer nanowire light emitting diodes are fabricated into a single cluster capable of exhibiting a wide spectral output range. The nanowires having InGaN/GaN quantum layers formed of quantum dots are tuned to different output wavelengths using different nanowire diameters, for example, to achieve a full spectral output range covering the entire visible spectrum for display applications. The entire cluster is formed using a monolithically integrated fabrication technique that employs a single-step selective area epitaxy growth.

InGaN-BASED LED EPITAXIAL WAFER AND FABRICATION METHOD THEREOF
20220115560 · 2022-04-14 · ·

An InGaN-based LED epitaxial wafer and a fabrication method thereof are disclosed, wherein the InGaN-based LED epitaxial wafer includes: a substrate; an InGaN layer, formed on a surface of the substrate, having an In content between 40% and 90%, so as to ensure that the LED epitaxial wafer is capable of emitting long-wavelength light or near-infrared rays; a p-type metal oxide layer, formed on a surface of the InGaN layer facing away from the substrate, acting as a hole injection layer for the InGaN layer.

DUAL EMISSION LED CHIP
20220085262 · 2022-03-17 ·

Proposed is a dual emission LED chip that emits light to the upper and lower sides of a PN junction, wherein the duel emission LED chip uses the electroluminescent effect of the PN junction including a P layer and an N layer provided below the P layer, and characterized in that the dual emission LED chip emits light in the upward direction of the P layer and the downward direction of the N layer. The dual emission chip can be applied as a single chip to a field requiring dual emission, thereby enabling miniaturization of applied equipment, and increases power efficiency, thereby reducing manufacturing costs. In addition, as the dual emission LED chip can be manufactured through a batch process, a separate packaging process is not required.

Deep ultraviolet light-emitting device and method of manufacturing same

Disclosed is a deep ultraviolet light-emitting device which includes on a substrate 10 in order: an n-type semiconductor layer 30, a light-emitting layer 40, a p-type electron block layer 60, and a p-type contact layer 70, wherein the p-type contact layer 70 comprises a superlattice structure having an alternating stack of: a first layer 71 made of Al.sub.xGa.sub.1-xN having an Al composition ratio x higher than an Al composition ratio w.sub.0 of a layer configured to emit deep ultraviolet light in the light-emitting layer; and a second layer 72 made of Al.sub.yGa.sub.1-yN having an Al composition ratio y lower than the Al composition ratio x, and the Al composition ratio w.sub.0, the Al composition ratio x, the Al composition ratio y, and a thickness average Al composition ratio z of the p-type contact layer satisfy the formula [1] 0.030<z−w.sub.0<0.20 and the formula [2] 0.050≤x−y≤0.47.