H01L33/007

Display device

A display device including a substrate and a plurality of pixels in a display region of the substrate. Each of the pixels includes first and second sub-pixels, and each of the first and second sub-pixels has a light emitting region for emitting light. The first sub-pixel includes a first light emitting element in the light emitting region and configured to emit visible light. The second sub-pixel includes a second light emitting element in the light emitting region and configured to emit infrared light and a light receiving element configured to receive the infrared light emitted from the second light emitting element to detect a user's touch. The second light emitting element and the light receiving element in the second sub-pixel are electrically insulated from and optically coupled to each other to form a photo-coupler.

Micro panchromatic QLED array device based on quantum dot transfer process of deep silicon etching templates, and preparation method therefor

A micro panchromatic QLED array device based on a quantum dot transfer process of deep silicon etching templates. Array-type square table structures pass through a p-type GaN layer and a quantum well active layer and are deep to an n-type GaN layer are disposed on a blue LED epitaxial wafer, wherein micro holes are formed through etching in the structures. Every 2*2 table structures constitute an RGB pixel unit. Among the four micro holes, three of the holes are filled with red light, green light and yellow light quantum dots respectively, and one of the holes emits blue light/is filled with a blue light quantum dot. Micro holes in a silicon wafer are formed through etching with a deep silicon etching technology; the micro holes in the silicon wafer are aligned with quantum dot filling areas on a micro-LED.

Micro light emitting diode
11107947 · 2021-08-31 · ·

Embodiments generally relate to micro-device arrays. In some embodiments, an array comprises a substrate and a plurality of micro-devices. Each micro-device is suspended over a cavity in the substrate by at least one lateral hinge attached to a side post formed into the substrate. Each micro-device comprises a bonding layer; a metal contact; semiconductor device layers; and a buffer layer. The semiconductor device layers may comprise GaN-based LED layers; wherein the buffer layer comprises AlGaN; and wherein the substrate comprises (111) oriented Silicon. In other cases, the semiconductor device layers may comprise InGaAsP-based LED layers; wherein the buffer layer comprises InGaP; and wherein the substrate comprises GaAs.

NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD OF MANUFACTURING THE SAME
20210193865 · 2021-06-24 · ·

A nitride semiconductor light-emitting element includes: an n-side nitride semiconductor layer; a p-side nitride semiconductor layer; and an active layer between the n-side nitride semiconductor layer and the p-side nitride semiconductor layer. The active layer includes: one or more well layers comprising a first well layer that is nearest to the n-side nitride semiconductor layer, and one or more barrier layers comprising a first barrier layer between the first well layer and the n-side nitride semiconductor layer. The first barrier layer comprises a Si-doped InGaN barrier layer and an undoped GaN barrier layer in this order from the n-side nitride semiconductor layer side.

Optoelectronic semiconductor device and method for producing an optoelectronic semiconductor device

An optoelectronic semiconductor device and a method for producing an optoelectronic semiconductor device are disclosed. In an embodiment an optoelectronic semiconductor device includes a semiconductor body having a first region of a first conductivity type, an active region configured to generate electromagnetic radiation and a second region of a second conductivity type in a stacking direction, an electrical contact metallization arranged on a side of the second region facing away from the active region and being opaque to the electromagnetic radiation, a radiation coupling-out region surrounding the electrical contact metallization at an edge side and an absorber layer structure arranged between the electrical contact metallization and the second region.

PROCESS FOR MANUFACTURING A RELAXED GAN/INGAN STRUCTURE
20210193870 · 2021-06-24 ·

A process comprising the following steps of: a) providing a device comprising: a GaN/InGaN structure comprising an electrically conductive doped GaN layer locally covered with InGaN mesas comprising a doped InGaN layer and an undoped or weakly doped InGaN layer, an electrically insulating layer covering the electrically conductive doped GaN layer between the mesas, b) connecting the electrically conductive doped GaN layer and a counter-electrode (500) to a voltage or current generator, c) dipping the device and the counter-electrode into an electrolyte solution, d) applying a voltage or current between the electrically conductive doped GaN layer and the second electrode to porosify the doped InGaN layer, e) forming an InGaN layer by epitaxy on the InGaN mesas, whereby a relaxed epitaxially grown InGaN layer is obtained.

METHOD FOR PRODUCING A PATTERNED LAYER OF MATERIAL

Method for producing a patterned layer of material, comprising; producing a first substrate having a patterned face; producing, against the patterned face of the first substrate, a stack of layers comprising an intermediate layer and the layer to be patterned, the intermediate layer being disposed between the layer to be patterned and the first substrate, a first face of the intermediate layer disposed on the first substrate side being patterned in accordance with a design that is the inverse of that of the patterned face of the first substrate; removing the first substrate; anisotropic etching the intermediate layer from the first face of the intermediate layer, and etching at least part of the thickness of the layer to be patterned, patterning a face of the layer to be patterned in accordance with the design of the first face of the intermediate layer.

DOPED SEMICONDUCTOR LAYER FORMING METHOD

A method of obtaining a doped semiconductor layer, including the successive steps of: a) performing, in a first single-crystal layer made of a semiconductor alloy of at least a first element A1 and a second element A2, an ion implantation of a first element B which is a dopant for the alloy and of a second element C which is not a dopant for the alloy, to make an upper portion of the first layer amorphous and to preserve the crystal structure of a lower portion of the first layer; and b) performing a solid phase recrystallization anneal of the upper portion of the first layer, resulting in transforming the upper portion of the first layer into a doped single-crystal layer of the alloy.

Resonant optical cavity light emitting device
11127882 · 2021-09-21 · ·

Resonant optical cavity light emitting devices are disclosed, where the device includes an opaque substrate, a first reflective layer, a first spacer region, a light emitting region, a second spacer region, and a second reflective layer. The light emitting region is configured to emit a target emission deep ultraviolet wavelength and is positioned at a separation distance from the reflector. The second reflective layer may have a metal composition comprising elemental aluminum and a thickness less than 15 nm. The device has an optical cavity comprising the first spacer region, the second spacer region and the light emitting region, where the optical cavity has a total thickness less than or equal to K.Math.λ/n. K is a constant ranging from 0.25 to 10, λ is the target wavelength, and n is an effective refractive index of the optical cavity at the target wavelength.

MICRO-LED ARRAY DEVICE BASED ON III-NITRIDE SEMICONDUCTORS AND METHOD FOR FABRICATING SAME
20210193632 · 2021-06-24 · ·

A Micro-LED array device based on III-nitride semiconductors and a method for fabricating the same are provided. The Micro-LED array device includes arrayed sector mesa structures that are formed by etching to penetrate through a p-type GaN layer and a quantum-well active layer and deep into an n-type GaN layer, a p-type electrode array deposited by evaporation on the p-type GaN layer of sector arrays, and an n-type electrode array deposited by evaporation on the n-type GaN layer. The n-type electrode array forms blocking walls to isolate the sector mesas from one another. The blocking walls, and each of the blocking walls and the annular structure surrounding the sector mesa are connected to each other.