Described are light emitting diode (LED) devices having patterned substrates and methods for effectively growing epitaxial III-nitride layers on them. A nucleation layer, comprising a III-nitride material, is grown on a substrate before any patterning takes place. The nucleation layer results in growth of smooth coalesced III-nitride layers over the patterns.

A method for manufacturing a light-emitting element includes dividing a semiconductor structure into a plurality of light-emitting portions by removing a portion of the semiconductor structure so as to form an exposed region, a first surface being exposed from under the semiconductor structure in the exposed region; etching protrusions formed in the exposed region; bonding a light-transmitting body to a second surface so as to form a bonded body; forming a plurality of modified regions along the exposed region inside the substrate by irradiating a laser beam on the exposed region from the first surface side; removing a portion of the light-transmitting body that overlaps the plurality of modified regions in a plan view; and singulating the bonded body along the modified regions.

Described are arrays of light emitting diode (LED) devices and methods for their manufacture. An LED array comprises a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a tunnel junction on the first LED, the top surface comprising a second n-type layer on the tunnel junction. The LED array further comprises an adjacent mesa comprising a top surface, the first LED, a second LED including the second n-type layer, a second p-type layer and a second color active region. There is a first trench separating the first mesa and the adjacent mesa, n-type metallization in the first trench and in electrical contact with the first color active region and the second color active region of the adjacent mesa, and p-type metallization contacts on the n-type layer of the first mesa and on the p-type layer of the adjacent mesa.

Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the SST, a second semiconductor material at a second side of the SST opposite the first side, and an active region between the first and second semiconductor materials. The SST can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. A portion of the first contact can be covered by a dielectric material, and a portion can remain exposed through the dielectric material. A conductive carrier substrate can be disposed on the dielectric material. An isolating via can extend through the conductive carrier substrate to the dielectric material and surround the exposed portion of the first contact to define first and second terminals electrically accessible from the first side.

A gallium nitride (GaN) based light emitting diode (LED), wherein light is extracted through a nitrogen face (N-face) of the LED and a surface of the N-face is roughened into one or more hexagonal shaped cones. The roughened surface reduces light reflections occurring repeatedly inside the LED, and thus extracts more light out of the LED. The surface of the N-face is roughened by an anisotropic etching, which may comprise a dry etching or a photo-enhanced chemical (PEC) etching.

Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured.

An illumination device includes a supporting base, and a light-emitting element inserted in the supporting base. The light-emitting element includes a substrate having a supporting surface and a side surface, a light-emitting chip disposed on the supporting surface, and a first wavelength conversion layer covering the light-emitting chip and only a portion of the supporting surface without covering the side surface.

Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.

A semiconductor chip and a method for producing a semiconductor chip are disclosed. In an embodiment an electronic semiconductor chip includes a growth substrate with a growth surface, which is formed by a planar region having a plurality of three-dimensional surface structures on the planar region, a nucleation layer composed of oxygen-containing AlN directly disposed on the growth surface and a nitride-based semiconductor layer sequence disposed on the nucleation layer, wherein the semiconductor layer sequence is selectively grown from the planar region such that a growth of the semiconductor layer sequence on surfaces of the three-dimensional surface structures is reduced or non-existent compared to a growth on the planar region, and wherein a selectivity of the growth of the semiconductor layer sequence on the planar region is targetedly adjusted by an oxygen content of the nucleation layer.

A process for obtaining a nitride (N) layer preferably obtained from at least one of gallium (Ga), indium (In) and aluminium (Al), may include: on a stack including a substrate and at least the following layers successively disposed from the substrate: a creep layer having a glass transition temperature, T.sub.glass transition, and a crystalline layer, forming pads by etching the stack so that each pad includes at least a creep segment formed by at least a portion of the creep layer, and a crystalline segment formed by the crystalline layer; and growing by epitaxy a crystallite on each of the pads and continuing the epitaxial growth of the crystallites so as to form the nitride layer. The epitaxial growth may be carried out at a temperature T.sub.epitaxy, such that T.sub.epitaxy≥k1×T.sub.glass transition, with k1 being 0.8.