A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

A light emitting diode (LED) array may include a first pixel and a second pixel on a substrate. The first pixel and the second pixel may include one or more tunnel junctions on one or more LEDs. The LED array may include a first trench between the first pixel and the second pixel. The trench may extend to the substrate.

The present disclosure relates to a vertical deep-ultraviolet light-emitting diode and a method for manufacturing the same. The vertical deep-ultraviolet light-emitting diode includes: a conductive substrate, wherein the conductive substrate includes a first surface and a second surface opposite to the first surface; an epitaxial layer, disposed on the first surface of the conductive substrate, and comprising a P-type GaN layer, an electron blocking layer, a quantum well layer and an N-type AlGaN layer that are successively laminated along a direction from the second surface to the first surface, wherein the epitaxial layer has a thickness less than 1 μm; an N-type electrode, disposed on a surface, facing away from the conductive substrate, of the epitaxial layer; and a P-type electrode, disposed on the second surface.

A semiconductor structure comprising a matrix having a first cubic Group-III nitride with a first band gap, and a second cubic Group-III nitride having a second band gap and forming a region embedded within the matrix. The second cubic Group-III nitride comprises an alloying material which reduces the second band gap relative to the first band gap, a quantum wire is defined by a portion within the region embedded within the matrix, the portion forming a one-dimensional charge-carrier confinement channel, wherein the quantum wire is operable to exhibit emission luminescence which is optically polarised.

A monolithic LED system that is configured to emit a variety of peak wavelengths of light in response to variations in a driving current density includes an n-type region, a p-type region, and a multiple quantum well (MQW) region formed between the n-type region and the p-type region. The MQW region includes parallel layers, each doped with a percentage of Indium to enable a range of light emission between 400 and 600 nm, and one or more V-grooves formed within a portion of the parallel layers. Each of the one or more V-grooves has a lower concentration of the doped percentage of the Indium than other portions of the parallel layers. Transition regions between the one or more V-grooves and the other portions of the parallel layers have a higher concentration of the doped percentage of the Indium which decreases with distance from the one or more V-grooves.

A method of manufacturing an optoelectronic device including-light-emitting diodes comprising the forming of three-dimensional semiconductor elements made of a III-V compound, each comprising a lower portion and an upper portion and, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor area of the III-V compound covering the active area. The upper portions are formed by vapor deposition at a pressure lower than 1.33 mPa.

A method for obtaining mesas that are made at least in part of a nitride (N), the method includes providing a stack comprising a substrate and at least the following layers disposed in succession from the substrate a first layer, referred to as the flow layer, and a second, crystalline layer, referred to as the crystalline layer; forming pads by etching the crystalline layer and at least one portion of the flow layer such that: —each pad includes at least: —a first section, referred to as the flow section, formed by at least one portion of the flow layer, and a second, crystalline section, referred to as the crystalline section, framed by the crystalline layer and overlying the flow section, the pads are distributed over the substrate so as to form a plurality of sets of pads; and epitaxially growing a crystallite on at least some of said pads and continuing the epitaxial growth of the crystallites until the crystallites carried by the adjacent pads of the same set coalesce.

An optoelectronic device includes a substrate, at least one first light-emitting diode and at least one second light-emitting diode, each first light-emitting diode having a first primary doped semiconductor portion, a first secondary active semiconductor portion, and a first tertiary doped semiconductor portion. Each second light-emitting diode includes a second primary doped semiconductor portion, a second secondary active semiconductor portion, and a second tertiary doped semiconductor portion. A first external lateral portion is configured to allow the first atomic species to diffuse until the first secondary active semiconductor portion reaches an atomic concentration of indium between 13% and 20%. A second external lateral portion is configured to allow the first atomic species to diffuse until the second secondary active semiconductor portion reaches an atomic concentration of indium between 20% and 40%.

GaN-based nanowire heterostructures have been intensively studied for applications in light emitting diodes (LEDs), lasers, solar cells and solar fuel devices. Surface charge properties play a dominant role on the device performance and have been addressed within the prior art by use of a relatively thick large bandgap AlGaN shell covering the surfaces of axial InGaN nanowire LED heterostructures has been explored and shown substantial promise in reducing surface recombination leading to improved carrier injection efficiency and output power. However, these lead to increased complexity in device design, growth and fabrication processes thereby reducing yield/performance and increasing costs for devices. Accordingly, there are taught self-organising InGaN/AlGaN core-shell quaternary nanowire heterostructures wherein the In-rich core and Al-rich shell spontaneously form during the growth process.

A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm.sup.2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.