A method for fabricating a micro-LED module is disclosed. The method includes: preparing a micro-LED including a plurality of electrode pads and a plurality of LED cells; preparing a submount substrate including a plurality of electrodes corresponding to the plurality of electrode pads; and flip-bonding the micro-LED to the submount substrate through a plurality of solders located between the plurality of electrode pads and the plurality of electrodes. The flip-bonding includes heating the plurality of solders by a laser.

An LED wafer processing method includes a dividing step of rotatably mounting a first cutting blade having a first width in a first cutting unit, holding an LED wafer on a holding table, and then relatively moving the first cutting unit and the holding table to cut the wafer along each division line formed on the wafer, thereby forming a full-cut groove along each division line to thereby divide the wafer into individual chips. The method further includes rotatably mounting a second cutting blade having a second width larger than the first width in a second cutting unit after performing the dividing step, and then relatively moving the second cutting unit and the holding table to thereby polish the opposed side surfaces of the full-cut groove formed along each division line, whereby a polished groove larger in width than the full-cut groove is formed along each full-cut groove.

A light-emitting diode (LED) includes a substrate, an epitaxial layered structure, and a strain tuning layer. The epitaxial layered structure includes a buffer layer, an N-type cladding layer, an active layer, and a P-type cladding layer formed on the substrate in such order. The active layer includes a multiple quantum well structure. The strain tuning layer is disposed between the N-type cladding layer and the active layer, and has a lattice constant that is smaller than that of the N-type cladding layer. A method for manufacturing the LED is also disclosed.

A method for forming a semiconductor device comprising a graded wurtzite III-nitride alloy layer, including a wurtzite III-nitride alloy, on a second layer. A polarization doping concentration profile is selected for the graded wurtzite III-nitride alloy layer based on an intended function of the semiconductor device. Based on the selected polarization doping concentration profile for the graded wurtzite III-nitride alloy layer, a composition-polarization change rate of the graded wurtzite III-nitride alloy layer and a grading speed of the graded wurtzite III-nitride alloy layer are determined. The composition-polarization change rate and grading speed are based on a composition of first and second elements of the wurtzite III-nitride alloy. The graded wurtzite III-nitride alloy layer is formed on the second layer having the selected polarization doping concentration profile using the determined composition-polarization change rate and grading speed to adjust the composition of the first and second III-nitride elements of the wurtzite III-nitride alloy based on a current position in the graded wurtzite III-nitride alloy layer from the second layer.

An optoelectronic semiconductor component and a method for producing an optoelectronic semiconductor component are disclosed. In an embodiment an optoelectronic semiconductor component includes a semiconductor body including a first region, an active region configured to generate electromagnetic radiation, a starting region, a plurality of funnel-shaped openings and a second region, wherein the starting region is arranged between the first region and the active region, wherein the active region is arranged between the starting region and the second region, wherein the funnel-shaped openings extend from the starting region through the active region as far as the second region, wherein the semiconductor body is based on a nitride compound semiconductor material, wherein the first region comprises n-doping, wherein the second region comprises p-doping, wherein the funnel-shaped openings are filled with a material of the second region, and wherein the funnel-shaped openings have a pre-determinable density, the density of the funnel-shaped openings being decoupled from a density of dislocations inside the first region.

The present disclosure provides a method and structure for producing large area gallium and nitrogen engineered substrate members configured for the epitaxial growth of layer structures suitable for the fabrication of high performance semiconductor devices. In a specific embodiment the engineered substrates are used to manufacture gallium and nitrogen containing devices based on an epitaxial transfer process wherein as-grown epitaxial layers are transferred from the engineered substrate to a carrier wafer for processing. In a preferred embodiment, the gallium and nitrogen containing devices are laser diode devices operating in the 390 nm to 425 nm range, the 425 nm to 485 nm range, the 485 nm to 550 nm range, or greater than 550 nm.

A light emitting chip including a first LED sub-unit, a second LED sub-unit disposed on the first LED sub-unit, a third LED sub-unit disposed on the second LED sub-unit, a first bonding layer interposed between the first and second LED sub-units, a second bonding layer interposed between second and third LED sub-units, and a first connection electrode electrically connected to and overlapping at least one of the first, second, and third LED sub-units, the first connection electrode having first and second opposing side surfaces, the first side surface having a first length and the second side surface having a second length, in which the difference in length between the first side surface and the second side surface of the first connection electrode is greater than a thickness of at least one of the LED sub-units.

A process of forming a nucleus fanning layer in a nitride semiconductor epitaxial substrate is disclosed. The process includes steps of growing: a lower layer of the nucleus forming layer on a substrate; an upper layer of the nucleus thrilling layer on the lower layer; and a nitride semiconductor layer each by the metal organic chemical vapor deposition (MOCVD) technique. The growth of the nitride semiconductor layer is done at a temperature lower than a growth temperature for the upper layer, and the growth of the upper layer is done by supplying ammonia (NH.sub.3) at a flow rate greater than the flow rate of ammonia (NH.sub.3) timing the growth of the lower layer.

The present application discloses a nitride semiconductor light-emitting device and a manufacture method thereof. The nitride semiconductor light-emitting device includes an epitaxial structure, wherein the epitaxial structure has a first face and a second face opposite to the first face, the first face is a (0001) nitrogen face and located at the n type side of the epitaxial structure, the second face is located at the p type side of the epitaxial structure, the n type side of the epitaxial structure is electrically contacted with an n type electrode, the p type side is electrically contacted with a p type electrode, and a ridge waveguide structure is formed on the first face. The nitride semiconductor light-emitting device, especially a III-V nitride semiconductor laser or a super-radiance light-emitting diode, of the present application, has the advantages of low resistance, low internal loss, small threshold current, small thermal resistance and good stability and reliability and the like, and meanwhile the preparation process is simple and is easily implemented.

The present invention provides light-emitting devices with improved quantum efficiency. The light emitting diode structure comprising: a p-doped layer, an n-doped layer; and a multiple quantum well structure sandwiched between the p-doped layer and n-doped layer, wherein the multiple quantum well structure comprising a quantum well disposed between n-doped barrier layers.