A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first nitride semiconductor layer between the active region and the electron blocking structure; and a second nitride semiconductor layer between the electron blocking structure and the second semiconductor layer. The first nitride semiconductor layer includes a first indium content, a first aluminum content and a first conductivity-type dopant. The second nitride semiconductor layer includes a second indium content, a second aluminum content and a second conductivity-type dopant. The electron blocking structure includes a first semiconductor layer including a third indium content and a third aluminum content; wherein the third indium content is greater than the second indium content.

A light-emitting diode includes a first semiconductor region having a first conductive type; a second semiconductor region having a second conductive type; and an active layer disposed between the first semiconductor region and the second semiconductor region and including phosphorus (P). The light-emitting diode has a rod shape, the second semiconductor region includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, which are sequentially stacked, the first semiconductor layer is disposed between the active layer and the second semiconductor layer, and the second semiconductor layer includes a compound represented by AlGaInP and satisfying Equation 1.

A light-emitting diode, comprising a substrate that has a first surface and an opposing second surface. A reflection layer is disposed on the first surface of the substrate and a light-emitting diode structure is arranged on the second surface of the substrate. The light-emitting diode structure includes a first semiconducting layer, an active layer and a second semiconducting layer disposed consecutively on the second surface. A plurality of protruding asymmetric micro-structured elements define at least a part of the second surface of the substrate such that at least a portion of a surface of each micro-structured element is disposed at an obtuse angle to the first surface of the substrate when measured from within the respective micro-structured element. The first semiconducting layer and the second semiconducting layer respectively have a first electrode and a second electrode.

A micro light-emitting diode and a display panel are provided. The micro light-emitting diode includes a semiconductor epitaxial stacked layer including a first semiconductor layer, a second semiconductor layer and an active layer therebetween; a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer. The second semiconductor layer includes an N-type gallium phosphide (GaP) window layer, and the N-type GaP window layer plays a role in current spreading. The problem of low luminous efficiency of the micro light-emitting diode at a low current density can be solved and the luminous efficiency of the micro light-emitting diode at a low current density can be improved.

A stacked III-V semiconductor diode having an n.sup.+-layer with a dopant concentration of at least 10.sup.19 N/cm.sup.3, an n.sup.-layer with a dopant concentration of 10.sup.12-10.sup.16 N/cm.sup.3, a layer thickness of 10-300 microns, a p.sup.+-layer with a dopant concentration of 510.sup.18-510.sup.20 cm.sup.3, with a layer thickness greater than 2 microns, wherein said layers follow one another in the sequence mentioned, each comprising a GaAs compound. The n.sup.+-layer or the p.sup.+-layer is formed as the substrate and a lower side of the n.sup.-layer is materially bonded with an upper side of the n.sup.+-layer, and a doped intermediate layer is arranged between the n-layer and the p+-layer and materially bonded with an upper side and a lower side.

Disclosed is an infrared light emitting device including: a semiconductor substrate; a first layer formed on the semiconductor substrate and having a first conductivity type; a light emitting layer formed on the first layer; and a second layer formed on the light emitting layer and having a second conductivity type, wherein the first layer includes, in the stated order: a layer containing Al.sub.x(1)In.sub.1x(1)Sb; a layer having a film thickness t.sub.y(1) in nanometers and containing Al.sub.y(1)In.sub.1y(1)Sb; and a layer containing Al.sub.x(2)In.sub.1x(2)Sb, where t.sub.y(1), x(1), x(2), and y(1) satisfy the following relations: for j=1, 2, 0<t.sub.y(1)2360(y(1)x(j))240 (0.11y(1)x(j)0.19), 0<t.sub.y(1)1215(y(1)x(j))+427 (0.19<y(1)x(j)0.33), and 0<x(j)<0.18.

A device may include a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer. The device may include a first sidewall and a second sidewall on a second surface of the epitaxial layer distal to the first isolation region and the second isolation region. The device may include a wavelength converting layer on the epitaxial layer between the first sidewall and the second sidewall.

A semiconductor light emitting device includes a first light emitting portion including a first semiconductor stack, as well as a first lower dispersion Bragg reflector (DBR) layer and a first upper dispersion Bragg reflector (DBR) layer, disposed above and below the first semiconductor stack, a second light emitting portion including a second semiconductor stack, as well as a second lower dispersion Bragg reflector (DBR) layer and a second upper dispersion Bragg reflector (DBR) layer, disposed above and below the second semiconductor stack, a third light emitting portion including a third semiconductor stack, as well as a third lower dispersion Bragg reflector (DBR) layer and a third upper dispersion Bragg reflector (DBR) layer, disposed above and below the third semiconductor stack, a first bonding layer disposed between the first light emitting portion and the second light emitting portion, and a second bonding layer disposed between the second light emitting portion and the third light emitting portion.

Embodiments relate to forming a conformable interface layers (clayers) on small semiconductor devices, such as light emitting diodes (LEDs) to facilitate adhesion with a pick-up head for operations during the manufacturing of an electronic display. A conformable material is formed in regions between LED dies on a carrier substrate and over the LED dies. A mask is applied over the conformable material to selectively cover the conformable material. Portions of the conformable material are exposed to light to selectively cure or not cure the portions of the conformable material. The conformable material between the LED dies is removed to form a conformable interface layer over each of the LED dies.

A light-emitting diode (LED) chip includes a semiconductor laminated layer including a first semiconductor layer, a light-emitting layer and a second semiconductor layer arranged from bottom to top, a transparent conductive layer disposed on the semiconductor laminated layer, a transparent bonding layer disposed on the transparent conductive layer, and a transparent substrate disposed on the transparent bonding layer. The second semiconductor layer includes a first sublayer and a second sublayer disposed on a part of an upper surface of the first sublayer, and a doping concentration of the first sublayer is lower than that of the second sublayer. The transparent conductive layer is in contact with an upper surface of the second sublayer and a part of the upper surface of the first sublayer around the second sublayer. The LED chip can improve the manufacturing yield and ensure the ohmic contact and uniform lateral current spreading.