A 3D semiconductor device including: a first single crystal layer with first transistors; overlaid by a first metal layer; a second metal layer overlaying the first metal layer and being overlaid by a third metal layer; a logic gates including at least the first metal layer interconnecting the first transistors; second transistors disposed atop the third metal layer; third transistors disposed atop the second transistors; a top metal layer disposed atop the third transistors; and a memory array including word-lines, and at least four memory mini arrays, where each of the memory mini arrays includes at least four rows by four columns of memory cells, where each of the memory cells includes at least one of the second transistors or third transistors, sense amplifier circuit(s) for each of the memory mini arrays, the second metal layer provides a greater current carrying capacity than the third metal layer.

A display device manufacturing substrate according to the present disclosure comprises: a base part; assembly electrodes which extend in one direction and which are arranged on the base part; a dielectric layer formed on the base part to cover the assembly electrodes; a partitioning part formed on the dielectric layer; and cells which are formed in a plurality of rows and columns by means of the partitioning part, and on which semiconductor light-emitting elements are loaded, wherein the assembly electrodes extend in either the row direction or the column direction to overlap cells in the extending direction, and the assembly electrodes comprise a first assembly electrode overlapping cells that form one row or column, and a second assembly electrode simultaneously overlapping cells that form different rows or columns which are adjacent.

A display device is provided in an embodiment in the disclosure, including a subpixel region, a spacer, a light-emitting element, and a driving circuit. The spacer separates the subpixel region into a first region and a second region. The light-emitting element is located in at least one of the first region or the second region. The driving circuit is electrically connected to the first region and the second region, so as to drive the light-emitting element. A manufacturing method of the display device is also disclosed.

Provide are a transfer system and a transfer method. The transfer system is configured to transfer chips and includes a temporary substrate and a transfer device. The temporary substrate has a first surface and a second surface opposite to each other. There is a first angle between the second surface and the first surface. The transfer device has a transfer substrate and a plurality of transfer heads provided on the transfer substrate. The transfer substrate has a third surface and a fourth surface opposite to each other, and there is a second angle between the fourth surface and the third surface. The plurality of transfer heads are located at intervals on the fourth surface, and a side surface of the above-mentioned transfer head that faces away from the transfer substrate is parallel to the fourth surface.

In an embodiment, a method includes forming a conductive feature adjacent to a substrate; treating the conductive feature with a protective material, the protective material comprising an inorganic core with an organic coating around the inorganic core, the treating the conductive feature comprising forming a protective layer over the conductive feature; and forming an encapsulant around the conductive feature and the protective layer. In another embodiment, the method further includes, before forming the encapsulant, rinsing the protective layer with water. In another embodiment, the protective layer is selectively formed over the conductive feature.

A method for transferring at least one chip, from a first support to a second support, includes forming, while the chip is assembled to the first support, an interlayer in the liquid state between, and in contact with, a front face of the chip and an assembly surface of a face of the second support and a solidification of the interlayer. Then, the chip is detached from the first support while maintaining the interlayer in the solid state.

Disclosed is a light-emitting structure including a light-emitting diode and a connecting unit. The light-emitting diode includes an epitaxial laminate, a first electrode, and a second electrode. The epitaxial laminate includes a first type semiconductor layer, a second type semiconductor layer, and a light-emitting layer. The connecting unit is connected to the epitaxial laminate.

Disclosed in the present specification are a micro LED display device in which an assembly electrode capable of forming a non-uniform electric field is assembled in a provided assembly hole, and a manufacturing method therefor. The display device according to one embodiment of the present invention comprises: a substrate; a first assembly electrode and a second assembly electrode arranged to be spaced apart on the substrate; an insulating layer deposited on top of the first assembly electrode and the second assembly electrode; an assembly hole defining a pixel area formed on the insulating layer; a semiconductor light-emitting element assembled in the assembly hole; and a wiring electrode electrically connected to the semiconductor light-emitting element, wherein the first assembly electrode and the second assembly electrode have a pattern for generating non-uniform electric field in the assembly hole by means of applied voltage, and the semiconductor light-emitting element is assembled, on the basis of the non-uniform electric field, at a specific location in the assembly hole after moving in a specific direction.

A micro light emitting diode panel, including a circuit substrate, multiple transistor elements, and multiple micro light emitting diodes, is provided. The circuit substrate includes multiple signal lines, multiple bonding pads, and multiple thin film transistors. The bonding pads extend from at least part of the signal lines. The transistor elements are electrically bonded to a part of the bonding pads and are electrically connected to the thin film transistors. The micro light emitting diodes are electrically bonded to another part of the bonding pads and are electrically connected to the thin film transistors. The thin film transistors each have a first semiconductor pattern. The transistor elements each have a second semiconductor pattern. An electron mobility difference between the first semiconductor pattern and the second semiconductor pattern is greater than 30 cm.sup.2/V.Math.s. A method of fabricating the micro light emitting diode panel is also provided.

Techniques and mechanisms for mitigating stress on hybrid bonded interfaces in a multi-tier arrangement of integrated circuit (IC) dies. In an embodiment, first dies are bonded at a host die each via a respective one of first hybrid bond interfaces, wherein a second one or more dies are coupled to the host die each via a respective one of the first dies, and via a respective second hybrid bond interface. Stress at one of the hybrid bond interfaces is mitigated by properties of a first dielectric layer that extends to that hybrid bond interface. In another embodiment, stress at a given one of the hybrid bond interfaces is mitigated by properties of a dummy chip—or alternatively, properties of a patterned encapsulation structure—which is formed on the given hybrid bond interface.