Before a semiconductor die of a brittle III-V compound semiconductor is encapsulated with a molding compound during package fabrication, side surfaces of the semiconductor die are treated to avoid or prevent surface imperfections from propagating and fracturing the crystal structure of the substrate of the III-V compound semiconductor under the stresses applied as the molding compound solidifies. Surfaces are treated to form a passivation layer, which may be a passivated layer of the substrate or a passivation material on the substrate. In a passivated layer, imperfections of an external layer are transformed to be less susceptible to fracture. Passivation material, such as a poly-crystalline layer on the substrate surface, diffuses stresses that are applied by the molding compound. Semiconductor dies in flip-chip and wire-bond chip packages with treated side surfaces as disclosed have a reduced incidence of failure caused by die fracturing.

A method for transferring alignment marks between substrate systems includes providing a substrate having semiconductor devices and alignment marks in precise alignment with the semiconductor devices; and physically transferring and bonding the semiconductor devices and the alignment marks to a temporary substrate of a first substrate system. The method can also include physically transferring and bonding the semiconductor devices and the alignment marks to a mass transfer substrate of a second substrate system; and physically transferring and bonding the semiconductor devices and the alignment marks to a circuitry substrate of a third substrate system. A system for transferring alignment marks between substrate systems includes the substrate having the semiconductor devices and the alignment marks in precise alignment with the semiconductor devices. The system also includes the first substrate system, and can include the second substrate system and the third substrate system.

An adhesive structure is provided, which includes a plastic substrate, and an adhesive layer on the plastic substrate. The adhesive layer includes a releasable adhesive. The adhesive layer has a Young's modulus of 5 MPa to 14 MPa and an adhesive force to glass of 200 gf/25 mm to 2000 gf/25 mm. The adhesive structure can be used to transfer a device.

There is provided a semiconductor element containing gallium nitride. The semiconductor element includes a semiconductor layer including a first surface having a first region and a second region that is a projecting portion having a strip shape and projecting relative to the first region or a recessed portion having a strip shape and being recessed relative to the first region. Of the first surface, at least one of surfaces of the first region and the second region includes a crystal plane having a plane orientation different from a (000-1) plane orientation and a (1-100) plane orientation.

A micro light emitting diode panel, including a circuit substrate, multiple transistor elements, and multiple micro light emitting diodes, is provided. The circuit substrate includes multiple signal lines, multiple bonding pads, and multiple thin film transistors. The bonding pads extend from at least part of the signal lines. The transistor elements are electrically bonded to a part of the bonding pads and are electrically connected to the thin film transistors. The micro light emitting diodes are electrically bonded to another part of the bonding pads and are electrically connected to the thin film transistors. The thin film transistors each have a first semiconductor pattern. The transistor elements each have a second semiconductor pattern. An electron mobility difference between the first semiconductor pattern and the second semiconductor pattern is greater than 30 cm.sup.2/V.Math.s. A method of fabricating the micro light emitting diode panel is also provided.

A method of fabricating integrated passive device dies includes forming a first plurality of integrated passive devices on a substrate, forming a plurality of micro-bumps on the first plurality of integrated passive devices such that the plurality of micro-bumps act as electrical connections to the integrated passive devices, and dicing the substrate to form an integrated passive device die including a second plurality of integrated passive devices. The micro-bumps may be formed in an array or staggered configuration and may have a pitch that is in a range from 20 microns to 100 microns. The integrated passive devices may each include a seal ring and the integrated passive device die may have an area that is a multiple of an integrated passive device area. The method may further include dicing the substrate in various ways to generate integrated passive device dies having different sizes and numbers of integrated passive devices.

A transfer printing method is described that can be used for a wide variety of materials, such as to allow for circuits formed of different materials to be integrated together on a single integrated circuit. A tether (18) is formed on dice regions (16) of a first wafer (30), followed by attachment of a second wafer (32) to the tethers. The dice regions (16) are processed so as to be separated, followed by transfer printing of the dice regions to a third wafer (34).

A method for manufacturing a semiconductor element according to the present disclosure includes an element layer forming step of forming a semiconductor element layer on a first surface of a ground substrate; a first supporting substrate preparing step of positioning a first supporting substrate that has a third surface and has a bonding material located on the third surface so that the third surface faces the first surface; a pressing step of causing the bonding material to enter a gap between the ground substrate and the semiconductor element layer; and a peeling step of peeling off the first supporting substrate, the bonding material, and the semiconductor element layer from the ground substrate.

A manufacturing method of a chip-attached substrate includes preparing a stacked substrate including multiple chips, a first substrate to which the multiple chips are temporarily bonded, and a second substrate bonded to the first substrate with the multiple chips therebetween; and separating the multiple chips bonded to the first substrate and the second substrate from the first substrate to bond the multiple chips to one surface of a third substrate including a device layer.

A manufacturing method for a device chip includes a wafer preparation step of preparing a wafer including a base substrate, a laser beam absorbing layer layered on a front surface of the base substrate, and a device layer being layered on the laser beam absorbing layer and having devices formed in respective separate regions demarcated by a plurality of crossing division lines, a device layer dividing step of forming respective division grooves that divide at least the device layer into individual device chips along the plurality of division lines, and a lift-off step of, after the device layer dividing step is carried out, applying a laser beam of such a wavelength as to be absorbed in the laser beam absorbing layer, from the base substrate side, and lifting off a device chip from the front surface of the base substrate.