A technique relates to a superconducting chip. Resonant units have resonant frequencies, and the resonant units are configured as superconducting resonators. Josephson junctions are in the resonant units, and one or more of the Josephson junctions have a shorted tunnel barrier.

An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.

A technique relates to a superconducting chip. Resonant units have resonant frequencies, and the resonant units are configured as superconducting resonators. Josephson junctions are in the resonant units, and one or more of the Josephson junctions have a shorted tunnel barrier.

A security and/or identification device including an integrated circuit and an antenna or a battery, and methods of manufacturing and using the same, are disclosed. The integrated circuit is on a substrate to be applied, affixed or attached to a package or container, and includes a set of connection pads electrically connectable to an external component, and a memory storing a unique identification number. The antenna or battery may be on the same or a different substrate. The antenna receives a first wireless signal, transmits a second wireless signal, and enables the integrated circuit to extract power from the first wireless signal. The battery provides power to the integrated circuit. The connection pads may be electrically connectable to one or more sensing lines, and the integrated circuit may further include a continuity sensor configured to determine a continuity state of the package/container.

Techniques are presented for ensuring alignment marks are available for use and patterning magnetoresistive devices following the deposition of layers used to form the magnetoresistive devices. In some cases, the plurality of layers corresponding to the magnetoresistive devices are selectively etched in order to expose the underlying alignment marks, whereas in other embodiments, the deposition of the plurality of layers is controlled by deposition tool tabs that prevent the materials from obscuring the underlying alignment marks.

An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.

Provided are a multichip debugging method and a multichip system adopting the same. The multichip system includes: a first chip including a first debugging port and first identification (ID) information, a second chip including a second debugging port and second ID information, and a test access port (TAP) electrically connected to the first debugging port and the second debugging port and configured to connect to a test apparatus via the TAP.

A composite integrated circuit (IC) includes a first circuit layer, a second circuit layer having a first chip and a second chip, and a first wireless power transfer (WPT) device in the first chip or the first circuit layer. The first WPT device generates a power supply voltage by extracting energy from an electromagnetic signal. A first tracking circuit in the second chip or the first circuit layer is powered by the power supply voltage from the first WPT device and stores or outputs tracking data in response to an instruction extracted from the electromagnetic signal.

An embedded chip-package is provided. In one example, the embedded chip-package includes a chip, an electrically insulating material at least partially encapsulating the chip, at least one metal layer configured to provide at least one electrically conductive connection to the chip, and an information section. The information section includes coded information about the embedded chip-package, wherein, in the information section, the information is coded as a pattern of electrically conductive portions and electrically insulating portions.

An optoelectronic component includes at least one optoelectronic semiconductor chip and an electronic first storage medium. The first storage medium electrically stores first component information. The component can be uniquely identified via the first component information. The optoelectronic component also includes a second storage medium which can be read out wirelessly at least in an unmounted state of the component. The second storage medium stores second component information that is representative of the first component information.