A packaged RF transistor amplifier includes an RF transistor amplifier die having a first terminal, a first lead, an integrated passive device that includes a first series microstrip transmission line, a first bond wire coupled between the first terminal and the first series microstrip transmission line, and a second bond wire coupled between the first series microstrip transmission line and the first lead.

A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A low-voltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.

A semiconductor device comprises; a lead frame having leads and a die pad; a printed circuit board including an electrode for the connection of each of the leads and the die pad, a wiring pattern, and an opening exposing a part of a surface of the die pad; the semiconductor element for processing a high frequency signal, mounted on a surface of a metal block bonded to the surface of the die pad exposed through the opening, and connected to the wiring pattern with a metal wire; electronic components connected to the wiring pattern and mounted on a surface of the printed circuit board; and a sealing resin to seal the printed circuit board, the semiconductor element, the electronic components, and the metal wire so as to expose rear surfaces of the leads and the die pad.

An amplifier module includes a module substrate and first and second power transistor dies. The first power transistor die is coupled to a mounting surface of the module substrate, and has first and second input/output (I/O) contact pads and a first ground contact pad, all of which are all exposed at a surface of the first power transistor die that faces toward the mounting surface of the module substrate. The second power transistor die also is coupled to the mounting surface, and has third and fourth I/O contact pads and a second ground contact pad. The third and fourth I/O contact pads are exposed at a surface of the second power transistor die that faces away from the mounting surface of the module substrate, and the second ground contact pad is exposed at a surface of the second power transistor die that faces toward the mounting surface.

This application provides a chip apparatus, including a die, a first bond pad, a second bond pad, and a first solder pad. The first bond pad and the second bond pad are disposed on an upper surface of the die. A first power module and a second power module are disposed in the die. The first power module is coupled to the first bond pad. The second power module is coupled to the second bond pad. The first solder pad is separately coupled to an external power supply of the chip apparatus, the first bond pad, and the second bond pad. According to the foregoing technical solution, isolation between different power modules is improved, and noise transmitted on a power supply path can be better filtered out. This improves power supply noise performance of the chip apparatus.

A semiconductor device package includes a plurality of input leads, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combined output lead configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal.

A module includes: a substrate having a first surface; a first component mounted on the first surface; a resin film covering the first component along a shape of the first component and covering a part of the first surface; and one or more wires disposed to extend over the first component on a side of the resin film farther from the substrate.

The present disclosure relates to a package capable of handling high radio frequency (RF) power, which includes a carrier, a ring structure attached to a top surface of the carrier, an RF die attached to the top surface of the carrier within an opening of the ring structure and electrically connected to the ring structure, a heat spreader attached to a top surface of the ring structure, and an output signal lead configured to send out RF output signals generated by the RF die. Herein, the heat spreader covers a portion of the top surface of the ring structure at an output side of the package, and the output signal lead is attached to a top surface of the heat spreader. As such, the RF output signals are capable of being transmitted from the RF die to the output signal lead through the ring structure and the heat spreader.

In an aspect, a heterojunction bipolar transistor (HBT) includes a sub-collector disposed on a collector. The collector has a collector contact disposed on the sub-collector and located on a first side of the heterojunction bipolar transistor. The HBT includes an emitter disposed on an emitter cap. The emitter has an emitter contact disposed on the emitter cap and located on a second side of the heterojunction bipolar transistor. The HBT includes a base having a base contact located on the second side of the heterojunction bipolar transistor.

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.