A package structure has a first die, a second die, the third die, a molding compound, a first redistribution layer, an antenna and conductive elements. The first die, the second die and the third die are molded in a molding compound. The first redistribution layer is disposed on the molding compound and is electrically connected to the first die, the second die and the third die. The antenna is located on the molding compound and electrically connected to the first die, the second die and the third die, wherein a distance of an electrical connection path between the first die and the antenna is smaller than or equal to a distance of an electrical connection path between the second die and the antenna and a distance of an electrical connection path between the third die and the antenna. The conductive elements are connected to the first redistribution layer, wherein the first redistribution layer is located between the conductive elements and the molding compound.

Systems and methods are provided for millimeter-wave (MMW) communication, the system includes a transceiver chip to generate and to receive signals. An interface is used to communicate the signals between the transceiver chip and one or more active antenna modules. The signals include modulated MMW signals and control signals. The transceiver chip includes baseband circuitry, up and down conversion mixers, and RF front-end circuitry. An active antenna module receives a first modulated MMW signal from the interface for transmission via antennas and to receive a second modulated MMW signal from the antennas for transmission through the interface to the transceiver chip.

The coaxial cable assembly generally has a coaxial cable; and a connector assembled to an end of the coaxial cable, the connector having a dielectric body having a connecting surface, a longitudinal groove recessed in the connecting surface and having a groove end spaced from an edge of the connecting surface, and a coplanar waveguide along the connecting surface, the coplanar waveguide having a signal conductor extending from the groove end to the edge and between ground conductors each extending from a respective lateral side of the longitudinal groove to the edge; the end of the coaxial cable being received in the longitudinal groove and having an inner conductor electrically connected to the signal conductor and an outer conductor electrically connected to the ground conductors in a manner allowing connection of the coaxial cable with another coplanar waveguide of an integrated circuit.

Systems and methods for improved chip device performance are discussed herein. An exemplary chip device for use in an integrated circuit comprises a bottom and a top opposite the bottom. The chip device comprises a through-chip device interconnect and a clearance region. The through-chip device interconnect is configured to provide an electrical connection between a ground plane trace on the bottom and a chip device path on the top of the chip device. The clearance region on the bottom of the chip device comprises an electrically conductive substance. The size and shape of the clearance region assists in impedance matching. The chip device path on the top of the chip device may further comprise at least one tuning stub. The size and shape of the at least one tuning stub also assists in impedance matching.

The disclosure is directed to an electronic package with an interposer between integrated circuit dies. At least one inner capacitor (e.g., single layer capacitor) is mounted to the interposer. The electronic package further includes an input passive circuit substrate and an output passive circuit substrate mechanically coupled to the metal base. Use of an interposer to be simultaneously solder attached with integrated circuit dies provides a configuration that improves linearity performance and/or wide video bandwidth of the electronic package (e.g., packages that use epoxy and laminate interposers). Further, such configuration facilitates efficient manufacturing of the electronic package at high volumes.

Provided is a microwave integrated circuit including: a semiconductor substrate; a plurality of amplification units that are formed in the semiconductor substrate; a wiring that is formed in one layer wiring excluding an uppermost layer wiring and a lowermost layer wiring among a plurality of layer wirings formed on the semiconductor substrate and is used for supplying power to the plurality of amplification units; and a plurality of vias that connect a plurality of conductive regions formed in the layer wiring with the wiring interposed therebetween and other conductive regions formed in a region interposing the wiring in the two layer wirings immediately above and immediately below the layer wiring, in which each of the plurality of vias forms a via structure connected to the conductive regions of the lowermost layer wiring by a plurality of other vias.

According to the present invention, an integrated circuit includes a first amplifier stage, a second amplifier stage, a first signal line connecting an output of the first amplifier stage and an input of the second amplifier stage to each other, a first plane for ground connected to the first amplifier stage, a second plane for ground connected to the second amplifier stage and at least one at least one line for ground connecting the first plane and the second plane to each other, wherein the at least one line has a center line having a length of 10 μm to 1 mm, a width of the at least one line is ⅓ or less of a width of the first plane, and a pattern ratio is 1 or more.

A semiconductor module has: an integrated circuit, which includes at least one oscillator for generating a radar signal; a rewiring layer for the external connection of the integrated circuit; and at least two antenna structures integrated into the semiconductor module for transmitting and/or receiving radar signals, at least one of the at least two antenna structures being connected to the integrated circuit, and at least one first one of the antenna structures being embedded in a housing material of the semiconductor module outside a height region of the rewiring layer.

A high-frequency device having a switching circuit including a semiconductor substrate; a first high-frequency input/output terminal; a second high-frequency input/output terminal; a control signal input terminal; a power terminal; a ground terminal; an insulating portion disposed on a main surface of the semiconductor substrate; and a voltage-applying electrode for applying a predetermined positive voltage from the power electrode to the semiconductor substrate, wherein the switching circuit includes a field-effect transistor disposed in an active region of the semiconductor substrate.

An integrated circuit package is provided. In some examples, the integrated circuit package is an antenna-on-package package that includes a plurality of dielectric layers, a plurality of conductor layers interspersed with the plurality of dielectric layers, and an integrated circuit die disposed on a first side of the plurality of dielectric layers. The plurality of conductor layers includes a first layer disposed on a second side of the plurality of dielectric layers that includes a set of antennas. In some such examples, the integrated circuit die includes radar processing circuitry, and the AOP integrated circuit package is configured for radar applications.